blob: 71c9fc463594ca16928651e1e4ea328556c53924 [file] [log] [blame]
Aaron Watry55845532013-06-25 13:55:32 +00001;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
Tom Stellard70f13db2013-10-10 17:11:46 +00002;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
Tom Stellard4489b852013-05-03 17:21:31 +00003
Tom Stellard79243d92014-10-01 17:15:17 +00004;EG-CHECK: {{^}}shl_v2i32:
Aaron Watry55845532013-06-25 13:55:32 +00005;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Tom Stellard4489b852013-05-03 17:21:31 +00007
Tom Stellard79243d92014-10-01 17:15:17 +00008;SI-CHECK: {{^}}shl_v2i32:
Tom Stellard326d6ec2014-11-05 14:50:53 +00009;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
10;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
Aaron Watry55845532013-06-25 13:55:32 +000011
12define void @shl_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
13 %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
14 %a = load <2 x i32> addrspace(1) * %in
15 %b = load <2 x i32> addrspace(1) * %b_ptr
16 %result = shl <2 x i32> %a, %b
17 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
18 ret void
19}
20
Tom Stellard79243d92014-10-01 17:15:17 +000021;EG-CHECK: {{^}}shl_v4i32:
Aaron Watry55845532013-06-25 13:55:32 +000022;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
23;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
26
Tom Stellard79243d92014-10-01 17:15:17 +000027;SI-CHECK: {{^}}shl_v4i32:
Tom Stellard326d6ec2014-11-05 14:50:53 +000028;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
29;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
30;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
31;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
Aaron Watry55845532013-06-25 13:55:32 +000032
33define void @shl_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
34 %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
35 %a = load <4 x i32> addrspace(1) * %in
36 %b = load <4 x i32> addrspace(1) * %b_ptr
Tom Stellard4489b852013-05-03 17:21:31 +000037 %result = shl <4 x i32> %a, %b
38 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
39 ret void
40}
Tom Stellard1cfd7a52013-05-20 15:02:12 +000041
Tom Stellard79243d92014-10-01 17:15:17 +000042;EG-CHECK: {{^}}shl_i64:
Jan Vesely25f36272014-06-18 12:27:13 +000043;EG-CHECK: SUB_INT {{\*? *}}[[COMPSH:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHIFT:T[0-9]+\.[XYZW]]]
44;EG-CHECK: LSHR {{\* *}}[[TEMP:T[0-9]+\.[XYZW]]], [[OPLO:T[0-9]+\.[XYZW]]], {{[[COMPSH]]|PV.[XYZW]}}
45;EG-CHECK: LSHR {{\*? *}}[[OVERF:T[0-9]+\.[XYZW]]], {{[[TEMP]]|PV.[XYZW]}}, 1
46;EG_CHECK-DAG: ADD_INT {{\*? *}}[[BIGSH:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
47;EG-CHECK-DAG: LSHL {{\*? *}}[[HISMTMP:T[0-9]+\.[XYZW]]], [[OPHI:T[0-9]+\.[XYZW]]], [[SHIFT]]
48;EG-CHECK-DAG: OR_INT {{\*? *}}[[HISM:T[0-9]+\.[XYZW]]], {{[[HISMTMP]]|PV.[XYZW]}}, {{[[OVERF]]|PV.[XYZW]}}
49;EG-CHECK-DAG: LSHL {{\*? *}}[[LOSM:T[0-9]+\.[XYZW]]], [[OPLO]], {{PS|[[SHIFT]]}}
50;EG-CHECK-DAG: SETGT_UINT {{\*? *}}[[RESC:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
51;EG-CHECK-DAG: CNDE_INT {{\*? *}}[[RESLO:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW]}}
52;EG-CHECK-DAG: CNDE_INT {{\*? *}}[[RESHI:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW], .*}}, 0.0
53
Tom Stellard79243d92014-10-01 17:15:17 +000054;SI-CHECK: {{^}}shl_i64:
Tom Stellard326d6ec2014-11-05 14:50:53 +000055;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
Jan Vesely25f36272014-06-18 12:27:13 +000056
57define void @shl_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
58 %b_ptr = getelementptr i64 addrspace(1)* %in, i64 1
59 %a = load i64 addrspace(1) * %in
60 %b = load i64 addrspace(1) * %b_ptr
61 %result = shl i64 %a, %b
62 store i64 %result, i64 addrspace(1)* %out
63 ret void
64}
65
Tom Stellard79243d92014-10-01 17:15:17 +000066;EG-CHECK: {{^}}shl_v2i64:
Jan Vesely25f36272014-06-18 12:27:13 +000067;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
68;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
69;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHA]]
70;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHB]]
71;EG-CHECK-DAG: LSHR {{.*}}, 1
72;EG-CHECK-DAG: LSHR {{.*}}, 1
73;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
74;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
75;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
76;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
77;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
78;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
79;EG-CHECK-DAG: LSHL
80;EG-CHECK-DAG: LSHL
81;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
82;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
83;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
84;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
85;EG-CHECK-DAG: CNDE_INT
86;EG-CHECK-DAG: CNDE_INT
87
Tom Stellard79243d92014-10-01 17:15:17 +000088;SI-CHECK: {{^}}shl_v2i64:
Tom Stellard326d6ec2014-11-05 14:50:53 +000089;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
90;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
Jan Vesely25f36272014-06-18 12:27:13 +000091
92define void @shl_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) {
93 %b_ptr = getelementptr <2 x i64> addrspace(1)* %in, i64 1
94 %a = load <2 x i64> addrspace(1) * %in
95 %b = load <2 x i64> addrspace(1) * %b_ptr
96 %result = shl <2 x i64> %a, %b
97 store <2 x i64> %result, <2 x i64> addrspace(1)* %out
98 ret void
99}
100
Tom Stellard79243d92014-10-01 17:15:17 +0000101;EG-CHECK: {{^}}shl_v4i64:
Jan Vesely25f36272014-06-18 12:27:13 +0000102;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
103;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
104;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHC:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHC:T[0-9]+\.[XYZW]]]
105;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHD:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHD:T[0-9]+\.[XYZW]]]
106;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHA]]
107;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHB]]
108;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHC]]
109;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHD]]
110;EG-CHECK-DAG: LSHR {{.*}}, 1
111;EG-CHECK-DAG: LSHR {{.*}}, 1
112;EG-CHECK-DAG: LSHR {{.*}}, 1
113;EG-CHECK-DAG: LSHR {{.*}}, 1
114;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
115;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
116;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHC:T[0-9]+\.[XYZW]]]{{.*}}, literal
117;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHD:T[0-9]+\.[XYZW]]]{{.*}}, literal
118;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
119;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
120;EG-CHECK-DAG: LSHL {{.*}}, [[SHC]]
121;EG-CHECK-DAG: LSHL {{.*}}, [[SHD]]
122;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
123;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
124;EG-CHECK-DAG: LSHL {{.*}}, [[SHC]]
125;EG-CHECK-DAG: LSHL {{.*}}, [[SHD]]
126;EG-CHECK-DAG: LSHL
127;EG-CHECK-DAG: LSHL
128;EG-CHECK-DAG: LSHL
129;EG-CHECK-DAG: LSHL
130;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
131;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
132;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHC]], literal
133;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHD]], literal
134;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
135;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
136;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
137;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
138;EG-CHECK-DAG: CNDE_INT
139;EG-CHECK-DAG: CNDE_INT
140;EG-CHECK-DAG: CNDE_INT
141;EG-CHECK-DAG: CNDE_INT
142
Tom Stellard79243d92014-10-01 17:15:17 +0000143;SI-CHECK: {{^}}shl_v4i64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000144;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
145;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
146;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
147;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
Jan Vesely25f36272014-06-18 12:27:13 +0000148
149define void @shl_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) {
150 %b_ptr = getelementptr <4 x i64> addrspace(1)* %in, i64 1
151 %a = load <4 x i64> addrspace(1) * %in
152 %b = load <4 x i64> addrspace(1) * %b_ptr
153 %result = shl <4 x i64> %a, %b
154 store <4 x i64> %result, <4 x i64> addrspace(1)* %out
155 ret void
156}