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Tony Linthicum1213a7a2011-12-12 21:14:40 +00001//===-- llvm/CallingConvLower.cpp - Calling Convention lowering -----------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the Hexagon_CCState class, used for lowering and
11// implementing calling conventions. Adapted from the machine independent
12// version of the class (CCState) but this handles calls to varargs functions
13//
14//===----------------------------------------------------------------------===//
15
16#include "HexagonCallingConvLower.h"
Craig Topperb25fda92012-03-17 18:46:09 +000017#include "Hexagon.h"
Chandler Carruth9fb823b2013-01-02 11:36:10 +000018#include "llvm/IR/DataLayout.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000019#include "llvm/Support/Debug.h"
20#include "llvm/Support/ErrorHandling.h"
21#include "llvm/Support/raw_ostream.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000022#include "llvm/Target/TargetMachine.h"
23#include "llvm/Target/TargetRegisterInfo.h"
Eric Christopherd9134482014-08-04 21:25:23 +000024#include "llvm/Target/TargetSubtargetInfo.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000025using namespace llvm;
26
27Hexagon_CCState::Hexagon_CCState(CallingConv::ID CC, bool isVarArg,
28 const TargetMachine &tm,
Craig Topperb94011f2013-07-14 04:42:23 +000029 SmallVectorImpl<CCValAssign> &locs,
Tony Linthicum1213a7a2011-12-12 21:14:40 +000030 LLVMContext &c)
Bill Wendling4a7a4082013-06-07 06:19:56 +000031 : CallingConv(CC), IsVarArg(isVarArg), TM(tm), Locs(locs), Context(c) {
Tony Linthicum1213a7a2011-12-12 21:14:40 +000032 // No stack is used.
33 StackOffset = 0;
34
Eric Christopherd9134482014-08-04 21:25:23 +000035 UsedRegs.resize(
36 (TM.getSubtargetImpl()->getRegisterInfo()->getNumRegs() + 31) / 32);
Tony Linthicum1213a7a2011-12-12 21:14:40 +000037}
38
39// HandleByVal - Allocate a stack slot large enough to pass an argument by
40// value. The size and alignment information of the argument is encoded in its
41// parameter attribute.
42void Hexagon_CCState::HandleByVal(unsigned ValNo, EVT ValVT,
43 EVT LocVT, CCValAssign::LocInfo LocInfo,
44 int MinSize, int MinAlign,
45 ISD::ArgFlagsTy ArgFlags) {
46 unsigned Align = ArgFlags.getByValAlign();
47 unsigned Size = ArgFlags.getByValSize();
48 if (MinSize > (int)Size)
49 Size = MinSize;
50 if (MinAlign > (int)Align)
51 Align = MinAlign;
52 unsigned Offset = AllocateStack(Size, Align);
53
54 addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset,
55 LocVT.getSimpleVT(), LocInfo));
56}
57
58/// MarkAllocated - Mark a register and all of its aliases as allocated.
59void Hexagon_CCState::MarkAllocated(unsigned Reg) {
Eric Christopherd9134482014-08-04 21:25:23 +000060 const TargetRegisterInfo &TRI = *TM.getSubtargetImpl()->getRegisterInfo();
Jakob Stoklund Olesen92a00832012-06-01 20:36:54 +000061 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
62 UsedRegs[*AI/32] |= 1 << (*AI&31);
Tony Linthicum1213a7a2011-12-12 21:14:40 +000063}
64
65/// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node,
66/// incorporating info about the formals into this state.
67void
68Hexagon_CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg>
69 &Ins,
70 Hexagon_CCAssignFn Fn,
71 unsigned SretValueInRegs) {
72 unsigned NumArgs = Ins.size();
73 unsigned i = 0;
74
75 // If the function returns a small struct in registers, skip
76 // over the first (dummy) argument.
77 if (SretValueInRegs != 0) {
78 ++i;
79 }
80
81
82 for (; i != NumArgs; ++i) {
83 EVT ArgVT = Ins[i].VT;
84 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
85 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, 0, 0, false)) {
86 dbgs() << "Formal argument #" << i << " has unhandled type "
87 << ArgVT.getEVTString() << "\n";
88 abort();
89 }
90 }
91}
92
93/// AnalyzeReturn - Analyze the returned values of an ISD::RET node,
94/// incorporating info about the result values into this state.
95void
96Hexagon_CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
97 Hexagon_CCAssignFn Fn,
98 unsigned SretValueInRegs) {
99
100 // For Hexagon, Return small structures in registers.
101 if (SretValueInRegs != 0) {
102 if (SretValueInRegs <= 32) {
103 unsigned Reg = Hexagon::R0;
104 addLoc(CCValAssign::getReg(0, MVT::i32, Reg, MVT::i32,
105 CCValAssign::Full));
106 return;
107 }
108 if (SretValueInRegs <= 64) {
109 unsigned Reg = Hexagon::D0;
110 addLoc(CCValAssign::getReg(0, MVT::i64, Reg, MVT::i64,
111 CCValAssign::Full));
112 return;
113 }
114 }
115
116
117 // Determine which register each value should be copied into.
118 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
119 EVT VT = Outs[i].VT;
120 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
121 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this, -1, -1, false)){
122 dbgs() << "Return operand #" << i << " has unhandled type "
123 << VT.getEVTString() << "\n";
124 abort();
125 }
126 }
127}
128
129
130/// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info
131/// about the passed values into this state.
132void
133Hexagon_CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg>
134 &Outs,
135 Hexagon_CCAssignFn Fn,
136 int NonVarArgsParams,
137 unsigned SretValueSize) {
138 unsigned NumOps = Outs.size();
139
140 unsigned i = 0;
141 // If the called function returns a small struct in registers, skip
142 // the first actual parameter. We do not want to pass a pointer to
143 // the stack location.
144 if (SretValueSize != 0) {
145 ++i;
146 }
147
148 for (; i != NumOps; ++i) {
149 EVT ArgVT = Outs[i].VT;
150 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
151 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this,
152 NonVarArgsParams, i+1, false)) {
153 dbgs() << "Call operand #" << i << " has unhandled type "
154 << ArgVT.getEVTString() << "\n";
155 abort();
156 }
157 }
158}
159
160/// AnalyzeCallOperands - Same as above except it takes vectors of types
161/// and argument flags.
162void
163Hexagon_CCState::AnalyzeCallOperands(SmallVectorImpl<EVT> &ArgVTs,
164 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
165 Hexagon_CCAssignFn Fn) {
166 unsigned NumOps = ArgVTs.size();
167 for (unsigned i = 0; i != NumOps; ++i) {
168 EVT ArgVT = ArgVTs[i];
169 ISD::ArgFlagsTy ArgFlags = Flags[i];
170 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, -1, -1,
171 false)) {
172 dbgs() << "Call operand #" << i << " has unhandled type "
173 << ArgVT.getEVTString() << "\n";
174 abort();
175 }
176 }
177}
178
179/// AnalyzeCallResult - Analyze the return values of an ISD::CALL node,
180/// incorporating info about the passed values into this state.
181void
182Hexagon_CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
183 Hexagon_CCAssignFn Fn,
184 unsigned SretValueInRegs) {
185
186 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
187 EVT VT = Ins[i].VT;
188 ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
189 if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this, -1, -1, false)) {
190 dbgs() << "Call result #" << i << " has unhandled type "
191 << VT.getEVTString() << "\n";
192 abort();
193 }
194 }
195}
196
197/// AnalyzeCallResult - Same as above except it's specialized for calls which
198/// produce a single value.
199void Hexagon_CCState::AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn) {
200 if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this, -1, -1,
201 false)) {
202 dbgs() << "Call result has unhandled type "
203 << VT.getEVTString() << "\n";
204 abort();
205 }
206}