Evan Cheng | 3578dd6 | 2007-03-20 22:22:38 +0000 | [diff] [blame^] | 1 | Common register allocation / spilling problem: |
2 | |||||
3 | mul lr, r4, lr | ||||
4 | str lr, [sp, #+52] | ||||
5 | ldr lr, [r1, #+32] | ||||
6 | sxth r3, r3 | ||||
7 | ldr r4, [sp, #+52] | ||||
8 | mla r4, r3, lr, r4 | ||||
9 | |||||
10 | can be: | ||||
11 | |||||
12 | mul lr, r4, lr | ||||
13 | mov r4, lr | ||||
14 | str lr, [sp, #+52] | ||||
15 | ldr lr, [r1, #+32] | ||||
16 | sxth r3, r3 | ||||
17 | mla r4, r3, lr, r4 | ||||
18 | |||||
19 | and then "merge" mul and mov: | ||||
20 | |||||
21 | mul r4, r4, lr | ||||
22 | str lr, [sp, #+52] | ||||
23 | ldr lr, [r1, #+32] | ||||
24 | sxth r3, r3 | ||||
25 | mla r4, r3, lr, r4 | ||||
26 | |||||
27 | It also increase the likelyhood the store may become dead. |