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Jia Liub22310f2012-02-18 12:03:15 +00001//===-- Sparc.td - Describe the Sparc Target Machine -------*- tablegen -*-===//
2//
Chris Lattner158e1f52006-02-05 05:50:24 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +00007//
Chris Lattner158e1f52006-02-05 05:50:24 +00008//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13//===----------------------------------------------------------------------===//
14// Target-independent interfaces which we are implementing
15//===----------------------------------------------------------------------===//
16
Evan Cheng977e7be2008-11-24 07:34:46 +000017include "llvm/Target/Target.td"
Chris Lattner158e1f52006-02-05 05:50:24 +000018
19//===----------------------------------------------------------------------===//
20// SPARC Subtarget features.
21//
Venkatraman Govindarajua54533ed2013-06-04 18:33:25 +000022
Chris Lattner158e1f52006-02-05 05:50:24 +000023def FeatureV9
24 : SubtargetFeature<"v9", "IsV9", "true",
25 "Enable SPARC-V9 instructions">;
26def FeatureV8Deprecated
27 : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true",
28 "Enable deprecated V8 instructions in V9 mode">;
29def FeatureVIS
30 : SubtargetFeature<"vis", "IsVIS", "true",
31 "Enable UltraSPARC Visual Instruction Set extensions">;
32
Venkatraman Govindaraju35e0c382013-08-25 18:30:06 +000033def FeatureHardQuad
34 : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true",
35 "Enable quad-word floating point instructions">;
36
Chris Lattner158e1f52006-02-05 05:50:24 +000037//===----------------------------------------------------------------------===//
Chris Lattner49b269d2008-03-17 05:41:48 +000038// Register File, Calling Conv, Instruction Descriptions
Chris Lattner158e1f52006-02-05 05:50:24 +000039//===----------------------------------------------------------------------===//
40
41include "SparcRegisterInfo.td"
Chris Lattner49b269d2008-03-17 05:41:48 +000042include "SparcCallingConv.td"
Chris Lattner158e1f52006-02-05 05:50:24 +000043include "SparcInstrInfo.td"
44
Jakob Stoklund Olesenb93331f2010-04-05 03:10:20 +000045def SparcInstrInfo : InstrInfo;
Chris Lattner158e1f52006-02-05 05:50:24 +000046
47//===----------------------------------------------------------------------===//
48// SPARC processors supported.
49//===----------------------------------------------------------------------===//
50
51class Proc<string Name, list<SubtargetFeature> Features>
52 : Processor<Name, NoItineraries, Features>;
53
54def : Proc<"generic", []>;
55def : Proc<"v8", []>;
56def : Proc<"supersparc", []>;
57def : Proc<"sparclite", []>;
58def : Proc<"f934", []>;
59def : Proc<"hypersparc", []>;
60def : Proc<"sparclite86x", []>;
61def : Proc<"sparclet", []>;
62def : Proc<"tsc701", []>;
63def : Proc<"v9", [FeatureV9]>;
64def : Proc<"ultrasparc", [FeatureV9, FeatureV8Deprecated]>;
65def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>;
66def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
67
68
69//===----------------------------------------------------------------------===//
70// Declare the target which we are implementing
71//===----------------------------------------------------------------------===//
72
73def Sparc : Target {
Chris Lattner158e1f52006-02-05 05:50:24 +000074 // Pull in Instruction Info:
75 let InstructionSet = SparcInstrInfo;
76}