Justin Holewinski | 7d8895e | 2011-04-20 15:37:17 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -march=ptx32 | FileCheck %s |
Che-Liang Chiou | a19f075 | 2011-03-14 11:26:01 +0000 | [diff] [blame] | 2 | |
| 3 | define ptx_device i32 @test_setp_eq_u32_rr(i32 %x, i32 %y) { |
| 4 | ; CHECK: setp.eq.u32 p0, r1, r2; |
| 5 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 6 | ; CHECK-NEXT: ret; |
| 7 | %p = icmp eq i32 %x, %y |
| 8 | %z = zext i1 %p to i32 |
| 9 | ret i32 %z |
| 10 | } |
| 11 | |
| 12 | define ptx_device i32 @test_setp_ne_u32_rr(i32 %x, i32 %y) { |
| 13 | ; CHECK: setp.ne.u32 p0, r1, r2; |
| 14 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 15 | ; CHECK-NEXT: ret; |
| 16 | %p = icmp ne i32 %x, %y |
| 17 | %z = zext i1 %p to i32 |
| 18 | ret i32 %z |
| 19 | } |
| 20 | |
| 21 | define ptx_device i32 @test_setp_lt_u32_rr(i32 %x, i32 %y) { |
| 22 | ; CHECK: setp.lt.u32 p0, r1, r2; |
| 23 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 24 | ; CHECK-NEXT: ret; |
| 25 | %p = icmp ult i32 %x, %y |
| 26 | %z = zext i1 %p to i32 |
| 27 | ret i32 %z |
| 28 | } |
| 29 | |
| 30 | define ptx_device i32 @test_setp_le_u32_rr(i32 %x, i32 %y) { |
| 31 | ; CHECK: setp.le.u32 p0, r1, r2; |
| 32 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 33 | ; CHECK-NEXT: ret; |
| 34 | %p = icmp ule i32 %x, %y |
| 35 | %z = zext i1 %p to i32 |
| 36 | ret i32 %z |
| 37 | } |
| 38 | |
| 39 | define ptx_device i32 @test_setp_gt_u32_rr(i32 %x, i32 %y) { |
| 40 | ; CHECK: setp.gt.u32 p0, r1, r2; |
| 41 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 42 | ; CHECK-NEXT: ret; |
| 43 | %p = icmp ugt i32 %x, %y |
| 44 | %z = zext i1 %p to i32 |
| 45 | ret i32 %z |
| 46 | } |
| 47 | |
| 48 | define ptx_device i32 @test_setp_ge_u32_rr(i32 %x, i32 %y) { |
| 49 | ; CHECK: setp.ge.u32 p0, r1, r2; |
| 50 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 51 | ; CHECK-NEXT: ret; |
| 52 | %p = icmp uge i32 %x, %y |
| 53 | %z = zext i1 %p to i32 |
| 54 | ret i32 %z |
| 55 | } |
| 56 | |
| 57 | define ptx_device i32 @test_setp_eq_u32_ri(i32 %x) { |
| 58 | ; CHECK: setp.eq.u32 p0, r1, 1; |
| 59 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 60 | ; CHECK-NEXT: ret; |
| 61 | %p = icmp eq i32 %x, 1 |
| 62 | %z = zext i1 %p to i32 |
| 63 | ret i32 %z |
| 64 | } |
| 65 | |
| 66 | define ptx_device i32 @test_setp_ne_u32_ri(i32 %x) { |
| 67 | ; CHECK: setp.ne.u32 p0, r1, 1; |
| 68 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 69 | ; CHECK-NEXT: ret; |
| 70 | %p = icmp ne i32 %x, 1 |
| 71 | %z = zext i1 %p to i32 |
| 72 | ret i32 %z |
| 73 | } |
| 74 | |
| 75 | define ptx_device i32 @test_setp_lt_u32_ri(i32 %x) { |
| 76 | ; CHECK: setp.eq.u32 p0, r1, 0; |
| 77 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 78 | ; CHECK-NEXT: ret; |
| 79 | %p = icmp ult i32 %x, 1 |
| 80 | %z = zext i1 %p to i32 |
| 81 | ret i32 %z |
| 82 | } |
| 83 | |
| 84 | define ptx_device i32 @test_setp_le_u32_ri(i32 %x) { |
| 85 | ; CHECK: setp.lt.u32 p0, r1, 2; |
| 86 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 87 | ; CHECK-NEXT: ret; |
| 88 | %p = icmp ule i32 %x, 1 |
| 89 | %z = zext i1 %p to i32 |
| 90 | ret i32 %z |
| 91 | } |
| 92 | |
| 93 | define ptx_device i32 @test_setp_gt_u32_ri(i32 %x) { |
| 94 | ; CHECK: setp.gt.u32 p0, r1, 1; |
| 95 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 96 | ; CHECK-NEXT: ret; |
| 97 | %p = icmp ugt i32 %x, 1 |
| 98 | %z = zext i1 %p to i32 |
| 99 | ret i32 %z |
| 100 | } |
| 101 | |
| 102 | define ptx_device i32 @test_setp_ge_u32_ri(i32 %x) { |
| 103 | ; CHECK: setp.ne.u32 p0, r1, 0; |
| 104 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 105 | ; CHECK-NEXT: ret; |
| 106 | %p = icmp uge i32 %x, 1 |
| 107 | %z = zext i1 %p to i32 |
| 108 | ret i32 %z |
| 109 | } |
Che-Liang Chiou | e34b271 | 2011-04-02 08:51:39 +0000 | [diff] [blame] | 110 | |
| 111 | define ptx_device i32 @test_setp_4_op_format_1(i32 %x, i32 %y, i32 %u, i32 %v) { |
| 112 | ; CHECK: setp.gt.u32 p0, r3, r4; |
| 113 | ; CHECK-NEXT: setp.eq.and.u32 p0, r1, r2, p0; |
| 114 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 115 | ; CHECK-NEXT: ret; |
| 116 | %c = icmp eq i32 %x, %y |
| 117 | %d = icmp ugt i32 %u, %v |
| 118 | %e = and i1 %c, %d |
| 119 | %z = zext i1 %e to i32 |
| 120 | ret i32 %z |
| 121 | } |
| 122 | |
| 123 | define ptx_device i32 @test_setp_4_op_format_2(i32 %x, i32 %y, i32 %w) { |
| 124 | ; CHECK: cvt.pred.u32 p0, r3; |
| 125 | ; CHECK-NEXT: setp.eq.and.u32 p0, r1, r2, !p0; |
| 126 | ; CHECK-NEXT: cvt.u32.pred r0, p0; |
| 127 | ; CHECK-NEXT: ret; |
| 128 | %c = trunc i32 %w to i1 |
| 129 | %d = icmp eq i32 %x, %y |
| 130 | %e = xor i1 %c, 1 |
| 131 | %f = and i1 %d, %e |
| 132 | %z = zext i1 %f to i32 |
| 133 | ret i32 %z |
| 134 | } |