blob: 3ad09cc6c6943061799f007bbd021befa4b828a9 [file] [log] [blame]
Bob Wilsona4e231c2010-10-22 21:41:48 +00001; RUN: opt < %s -instcombine -S | FileCheck %s
2
3; The alignment arguments for NEON load/store intrinsics can be increased
4; by instcombine. Check for this.
5
6; CHECK: vld4.v2i32({{.*}}, i32 32)
7; CHECK: vst4.v2i32({{.*}}, i32 16)
8
9@x = common global [8 x i32] zeroinitializer, align 32
10@y = common global [8 x i32] zeroinitializer, align 16
11
12%struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
13
14define void @test() nounwind ssp {
15 %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8* bitcast ([8 x i32]* @x to i8*), i32 1)
16 %tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0
17 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 1
18 %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2
19 %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 3
20 call void @llvm.arm.neon.vst4.v2i32(i8* bitcast ([8 x i32]* @y to i8*), <2 x i32> %tmp2, <2 x i32> %tmp3, <2 x i32> %tmp4, <2 x i32> %tmp5, i32 1)
21 ret void
22}
23
24declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8*, i32) nounwind readonly
25declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind