Simon Pilgrim | 37d977b | 2018-01-19 12:09:17 +0000 | [diff] [blame^] | 1 | ; RUN: llc -mtriple=x86_64-pc-win32 -stop-after machine-sink %s -o %t.mir |
| 2 | ; RUN: FileCheck %s < %t.mir |
| 3 | ; RUN: llc %t.mir -mtriple=x86_64-pc-win32 -run-pass machine-sink |
| 4 | ; Check that callee saved registers are printed in a format that can then be parsed. |
| 5 | |
| 6 | declare x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0) |
| 7 | |
| 8 | define i32 @caller(i32 %a0) nounwind { |
| 9 | %b1 = call x86_regcallcc i32 @callee(i32 %a0, i32 %a0, i32 %a0, i32 %a0, i32 %a0) |
| 10 | %b2 = add i32 %b1, %a0 |
| 11 | ret i32 %b2 |
| 12 | } |
| 13 | ; CHECK: name: caller |
| 14 | ; CHECK: CALL64pcrel32 @callee, CustomRegMask(%bh,%bl,%bp,%bpl,%bx,%ebp,%ebx,%esp,%rbp,%rbx,%rsp,%sp,%spl,%r10,%r11,%r12,%r13,%r14,%r15,%xmm8,%xmm9,%xmm10,%xmm11,%xmm12,%xmm13,%xmm14,%xmm15,%r10b,%r11b,%r12b,%r13b,%r14b,%r15b,%r10d,%r11d,%r12d,%r13d,%r14d,%r15d,%r10w,%r11w,%r12w,%r13w,%r14w,%r15w) |
| 15 | ; CHECK: RET 0, %eax |
| 16 | |
| 17 | define x86_regcallcc {i32, i32, i32} @test_callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0) nounwind { |
| 18 | %b1 = mul i32 7, %e0 |
| 19 | %b2 = udiv i32 5, %e0 |
| 20 | %b3 = mul i32 7, %d0 |
| 21 | %b4 = insertvalue {i32, i32, i32} undef, i32 %b1, 0 |
| 22 | %b5 = insertvalue {i32, i32, i32} %b4, i32 %b2, 1 |
| 23 | %b6 = insertvalue {i32, i32, i32} %b5, i32 %b3, 2 |
| 24 | ret {i32, i32, i32} %b6 |
| 25 | } |
| 26 | ; CHECK: name: test_callee |
| 27 | ; CHECK: calleeSavedRegisters: [ '%rbx', '%rbp', '%rsp', '%r10', '%r11', '%r12', |
| 28 | ; CHECK: '%r13', '%r14', '%r15', '%xmm8', '%xmm9', '%xmm10', |
| 29 | ; CHECK: '%xmm11', '%xmm12', '%xmm13', '%xmm14', '%xmm15' ] |
| 30 | ; CHECK: RET 0, %eax, %ecx, %edx |