blob: 303a1cb0391451ca9931a1287d0fd97cfb931dcc [file] [log] [blame]
Matt Arsenaultfb826fa2013-11-18 20:09:47 +00001; XFAIL: *
2; This will fail until i64 add is enabled
3
4; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI %s
5
6
7declare i32 @llvm.SI.tid() readnone
8
9; SI-LABEL: @test_i64_vreg:
10define void @test_i64_vreg(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %inA, i64 addrspace(1)* noalias %inB) {
11 %tid = call i32 @llvm.SI.tid() readnone
12 %a_ptr = getelementptr i64 addrspace(1)* %inA, i32 %tid
13 %b_ptr = getelementptr i64 addrspace(1)* %inB, i32 %tid
14 %a = load i64 addrspace(1)* %a_ptr
15 %b = load i64 addrspace(1)* %b_ptr
16 %result = add i64 %a, %b
17 store i64 %result, i64 addrspace(1)* %out
18 ret void
19}
20
Matt Arsenault3a4d86a2013-11-18 20:09:55 +000021; Check that the SGPR add operand is correctly moved to a VGPR.
22; SI-LABEL: @sgpr_operand:
23define void @sgpr_operand(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in, i64 addrspace(1)* noalias %in_bar, i64 %a) {
Matt Arsenault08f7e372013-11-18 20:09:50 +000024 %foo = load i64 addrspace(1)* %in, align 8
25 %result = add i64 %foo, %a
Matt Arsenaultfb826fa2013-11-18 20:09:47 +000026 store i64 %result, i64 addrspace(1)* %out
27 ret void
28}
29
Matt Arsenault08f7e372013-11-18 20:09:50 +000030; Swap the arguments. Check that the SGPR -> VGPR copy works with the
31; SGPR as other operand.
32;
Matt Arsenault3a4d86a2013-11-18 20:09:55 +000033; SI-LABEL: @sgpr_operand_reversed:
34define void @sgpr_operand_reversed(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in, i64 %a) {
35 %foo = load i64 addrspace(1)* %in, align 8
36 %result = add i64 %a, %foo
37 store i64 %result, i64 addrspace(1)* %out
38 ret void
39}
Matt Arsenault08f7e372013-11-18 20:09:50 +000040
41
Matt Arsenaultfb826fa2013-11-18 20:09:47 +000042; SI-LABEL: @test_v2i64_sreg:
43define void @test_v2i64_sreg(<2 x i64> addrspace(1)* noalias %out, <2 x i64> %a, <2 x i64> %b) {
44 %result = add <2 x i64> %a, %b
45 store <2 x i64> %result, <2 x i64> addrspace(1)* %out
46 ret void
47}
48
49; SI-LABEL: @test_v2i64_vreg:
50define void @test_v2i64_vreg(<2 x i64> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %inA, <2 x i64> addrspace(1)* noalias %inB) {
51 %tid = call i32 @llvm.SI.tid() readnone
52 %a_ptr = getelementptr <2 x i64> addrspace(1)* %inA, i32 %tid
53 %b_ptr = getelementptr <2 x i64> addrspace(1)* %inB, i32 %tid
54 %a = load <2 x i64> addrspace(1)* %a_ptr
55 %b = load <2 x i64> addrspace(1)* %b_ptr
56 %result = add <2 x i64> %a, %b
57 store <2 x i64> %result, <2 x i64> addrspace(1)* %out
58 ret void
59}