Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 3a7578c6589b910f9a04bae7f7f121dfe3281578 / . / llvm / test / CodeGen / PowerPC / memcmpIR.ll
blob: f052cc258df8d31b550c6271956bf3eb7611cdc7 [file] [log] [blame]
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame^]1; RUN: llc -o - -mtriple=powerpc64le-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s
2; RUN: llc -o - -mtriple=powerpc64-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s --check-prefix=CHECK-BE
3
4define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
5entry:
6 ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64*
7 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
8 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
9 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
10 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i64 [[BSWAP1]], [[BSWAP2]]
11 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
12 ; CHECK-NEXT: br i1 [[ICMP]], label %res_block, label
13
14 ; CHECK-LABEL: res_block:{{.*}}
15 ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64
16 ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
17 ; CHECK-NEXT: br label %endblock
18
19 ; CHECK: [[GEP1:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1
20 ; CHECK-NEXT: [[GEP2:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1
21 ; CHECK-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[GEP1]]
22 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[GEP2]]
23 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
24 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
25 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i64 [[BSWAP1]], [[BSWAP2]]
26 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
27 ; CHECK-NEXT: br i1 [[ICMP]], label %res_block, label %endblock
28
29
30 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64*
31 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
32 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i64 [[LOAD1]], [[LOAD2]]
33 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
34 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %res_block, label
35
36 ; CHECK-BE-LABEL: res_block:{{.*}}
37 ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64
38 ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
39 ; CHECK-BE-NEXT: br label %endblock
40
41 ; CHECK-BE: [[GEP1:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1
42 ; CHECK-BE-NEXT: [[GEP2:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1
43 ; CHECK-BE-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[GEP1]]
44 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[GEP2]]
45 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i64 [[LOAD1]], [[LOAD2]]
46 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
47 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %res_block, label %endblock
48
49 %0 = bitcast i32* %buffer1 to i8*
50 %1 = bitcast i32* %buffer2 to i8*
51 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16)
52 ret i32 %call
53}
54
55declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1
56
57define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
58 ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32*
59 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
60 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])
61 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])
62 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64
63 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[BSWAP2]] to i64
64 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i64 [[ZEXT1]], [[ZEXT2]]
65 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
66 ; CHECK-NEXT: br i1 [[ICMP]], label %res_block, label %endblock
67
68 ; CHECK-LABEL: res_block:{{.*}}
69 ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64
70 ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
71 ; CHECK-NEXT: br label %endblock
72
73 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*
74 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
75 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64
76 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64
77 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i64 [[ZEXT1]], [[ZEXT2]]
78 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
79 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %res_block, label %endblock
80
81 ; CHECK-BE-LABEL: res_block:{{.*}}
82 ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64
83 ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
84 ; CHECK-BE-NEXT: br label %endblock
85
86entry:
87 %0 = bitcast i32* %buffer1 to i8*
88 %1 = bitcast i32* %buffer2 to i8*
89 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4)
90 ret i32 %call
91}
92
93define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
94 ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64*
95 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
96 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]])
97 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]])
98 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i64 [[BSWAP1]], [[BSWAP2]]
99 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
100 ; CHECK-NEXT: br i1 [[ICMP]], label %res_block, label
101
102 ; CHECK-LABEL: res_block:{{.*}}
103 ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64
104 ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
105 ; CHECK-NEXT: br label %endblock
106
107 ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32*
108 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
109 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])
110 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])
111 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64
112 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[BSWAP2]] to i64
113 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i64 [[ZEXT1]], [[ZEXT2]]
114 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
115 ; CHECK-NEXT: br i1 [[ICMP]], label %res_block, label
116
117 ; CHECK: [[LOAD1:%[0-9]+]] = load i16, i16*
118 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16*
119 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD1]])
120 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD2]])
121 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[BSWAP1]] to i64
122 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[BSWAP2]] to i64
123 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i64 [[ZEXT1]], [[ZEXT2]]
124 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
125 ; CHECK-NEXT: br i1 [[ICMP]], label %res_block, label
126
127 ; CHECK: [[LOAD1:%[0-9]+]] = load i8, i8*
128 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8*
129 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32
130 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32
131 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]]
132 ; CHECK-NEXT: br label %endblock
133
134 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64*
135 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64*
136 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i64 [[LOAD1]], [[LOAD2]]
137 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
138 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %res_block, label
139
140 ; CHECK-BE-LABEL: res_block:{{.*}}
141 ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64
142 ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
143 ; CHECK-BE-NEXT: br label %endblock
144
145 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*
146 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
147 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64
148 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64
149 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i64 [[ZEXT1]], [[ZEXT2]]
150 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
151 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %res_block, label
152
153 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i16, i16*
154 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16*
155 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[LOAD1]] to i64
156 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[LOAD2]] to i64
157 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i64 [[ZEXT1]], [[ZEXT2]]
158 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp ne i64 [[SUB]], 0
159 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %res_block, label
160
161 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i8, i8*
162 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8*
163 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32
164 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32
165 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]]
166 ; CHECK-BE-NEXT: br label %endblock
167
168entry:
169 %0 = bitcast i32* %buffer1 to i8*
170 %1 = bitcast i32* %buffer2 to i8*
171 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15)
172 ret i32 %call
173}
174 ; CHECK: call = tail call signext i32 @memcmp
175 ; CHECK-BE: call = tail call signext i32 @memcmp
176define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
177
178entry:
179 %0 = bitcast i32* %buffer1 to i8*
180 %1 = bitcast i32* %buffer2 to i8*
181 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65)
182 ret i32 %call
183}
184
185define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE) {
186 ; CHECK: call = tail call signext i32 @memcmp
187 ; CHECK-BE: call = tail call signext i32 @memcmp
188entry:
189 %0 = bitcast i32* %buffer1 to i8*
190 %1 = bitcast i32* %buffer2 to i8*
191 %conv = sext i32 %SIZE to i64
192 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv)
193 ret i32 %call
194}