Philip Reames | 3a8104a | 2019-11-19 11:48:51 -0800 | [diff] [blame^] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py |
| 2 | ; RUN: opt < %s -analyze -scalar-evolution 2>&1 | FileCheck %s |
| 3 | |
| 4 | target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" |
| 5 | target triple = "x86_64-unknown-linux-gnu" |
| 6 | |
| 7 | define void @unsimplified_and1(i32 %n) { |
| 8 | ; CHECK-LABEL: 'unsimplified_and1' |
| 9 | ; CHECK-NEXT: Classifying expressions for: @unsimplified_and1 |
| 10 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 11 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 12 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 13 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 14 | ; CHECK-NEXT: %and = and i1 %becond, true |
| 15 | ; CHECK-NEXT: --> %becond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 16 | ; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and1 |
| 17 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 18 | ; CHECK-NEXT: Loop %loop: max backedge-taken count is -1 |
| 19 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 20 | ; |
| 21 | entry: |
| 22 | br label %loop |
| 23 | |
| 24 | loop: |
| 25 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 26 | %iv.inc = add nsw i32 %iv, 1 |
| 27 | %becond = icmp ule i32 %iv.inc, %n |
| 28 | %and = and i1 %becond, true |
| 29 | br i1 %and, label %loop, label %leave |
| 30 | |
| 31 | leave: |
| 32 | ret void |
| 33 | } |
| 34 | |
| 35 | define void @unsimplified_and2(i32 %n) { |
| 36 | ; CHECK-LABEL: 'unsimplified_and2' |
| 37 | ; CHECK-NEXT: Classifying expressions for: @unsimplified_and2 |
| 38 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 39 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 40 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 41 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 42 | ; CHECK-NEXT: %and = and i1 true, %becond |
| 43 | ; CHECK-NEXT: --> %and U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 44 | ; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and2 |
| 45 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 46 | ; CHECK-NEXT: Loop %loop: max backedge-taken count is -1 |
| 47 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 48 | ; |
| 49 | entry: |
| 50 | br label %loop |
| 51 | |
| 52 | loop: |
| 53 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 54 | %iv.inc = add nsw i32 %iv, 1 |
| 55 | %becond = icmp ule i32 %iv.inc, %n |
| 56 | %and = and i1 true, %becond |
| 57 | br i1 %and, label %loop, label %leave |
| 58 | |
| 59 | leave: |
| 60 | ret void |
| 61 | } |
| 62 | |
| 63 | define void @unsimplified_and3(i32 %n) { |
| 64 | ; CHECK-LABEL: 'unsimplified_and3' |
| 65 | ; CHECK-NEXT: Classifying expressions for: @unsimplified_and3 |
| 66 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 67 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } |
| 68 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 69 | ; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } |
| 70 | ; CHECK-NEXT: %and = and i1 false, %becond |
| 71 | ; CHECK-NEXT: --> %and U: [0,-1) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 72 | ; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and3 |
| 73 | ; CHECK-NEXT: Loop %loop: backedge-taken count is 0 |
| 74 | ; CHECK-NEXT: Loop %loop: max backedge-taken count is 0 |
| 75 | ; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is 0 |
| 76 | ; CHECK-NEXT: Predicates: |
| 77 | ; CHECK: Loop %loop: Trip multiple is 1 |
| 78 | ; |
| 79 | entry: |
| 80 | br label %loop |
| 81 | |
| 82 | loop: |
| 83 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 84 | %iv.inc = add nsw i32 %iv, 1 |
| 85 | %becond = icmp ule i32 %iv.inc, %n |
| 86 | %and = and i1 false, %becond |
| 87 | br i1 %and, label %loop, label %leave |
| 88 | |
| 89 | leave: |
| 90 | ret void |
| 91 | } |
| 92 | |
| 93 | define void @unsimplified_and4(i32 %n) { |
| 94 | ; CHECK-LABEL: 'unsimplified_and4' |
| 95 | ; CHECK-NEXT: Classifying expressions for: @unsimplified_and4 |
| 96 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 97 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } |
| 98 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 99 | ; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } |
| 100 | ; CHECK-NEXT: %and = and i1 %becond, false |
| 101 | ; CHECK-NEXT: --> false U: [0,-1) S: [0,-1) Exits: false LoopDispositions: { %loop: Invariant } |
| 102 | ; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and4 |
| 103 | ; CHECK-NEXT: Loop %loop: backedge-taken count is 0 |
| 104 | ; CHECK-NEXT: Loop %loop: max backedge-taken count is 0 |
| 105 | ; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is 0 |
| 106 | ; CHECK-NEXT: Predicates: |
| 107 | ; CHECK: Loop %loop: Trip multiple is 1 |
| 108 | ; |
| 109 | entry: |
| 110 | br label %loop |
| 111 | |
| 112 | loop: |
| 113 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 114 | %iv.inc = add nsw i32 %iv, 1 |
| 115 | %becond = icmp ule i32 %iv.inc, %n |
| 116 | %and = and i1 %becond, false |
| 117 | br i1 %and, label %loop, label %leave |
| 118 | |
| 119 | leave: |
| 120 | ret void |
| 121 | } |
| 122 | |
| 123 | define void @unsimplified_or1(i32 %n) { |
| 124 | ; CHECK-LABEL: 'unsimplified_or1' |
| 125 | ; CHECK-NEXT: Classifying expressions for: @unsimplified_or1 |
| 126 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 127 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 128 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 129 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 130 | ; CHECK-NEXT: %or = or i1 %becond, true |
| 131 | ; CHECK-NEXT: --> %or U: [-1,0) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 132 | ; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or1 |
| 133 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 134 | ; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count. |
| 135 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 136 | ; |
| 137 | entry: |
| 138 | br label %loop |
| 139 | |
| 140 | loop: |
| 141 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 142 | %iv.inc = add nsw i32 %iv, 1 |
| 143 | %becond = icmp ule i32 %iv.inc, %n |
| 144 | %or = or i1 %becond, true |
| 145 | br i1 %or, label %loop, label %leave |
| 146 | |
| 147 | leave: |
| 148 | ret void |
| 149 | } |
| 150 | |
| 151 | define void @unsimplified_or2(i32 %n) { |
| 152 | ; CHECK-LABEL: 'unsimplified_or2' |
| 153 | ; CHECK-NEXT: Classifying expressions for: @unsimplified_or2 |
| 154 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 155 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 156 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 157 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 158 | ; CHECK-NEXT: %or = or i1 true, %becond |
| 159 | ; CHECK-NEXT: --> %or U: [-1,0) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 160 | ; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or2 |
| 161 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 162 | ; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count. |
| 163 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 164 | ; |
| 165 | entry: |
| 166 | br label %loop |
| 167 | |
| 168 | loop: |
| 169 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 170 | %iv.inc = add nsw i32 %iv, 1 |
| 171 | %becond = icmp ule i32 %iv.inc, %n |
| 172 | %or = or i1 true, %becond |
| 173 | br i1 %or, label %loop, label %leave |
| 174 | |
| 175 | leave: |
| 176 | ret void |
| 177 | } |
| 178 | |
| 179 | define void @unsimplified_or3(i32 %n) { |
| 180 | ; CHECK-LABEL: 'unsimplified_or3' |
| 181 | ; CHECK-NEXT: Classifying expressions for: @unsimplified_or3 |
| 182 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 183 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 184 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 185 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 186 | ; CHECK-NEXT: %or = or i1 false, %becond |
| 187 | ; CHECK-NEXT: --> %or U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 188 | ; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or3 |
| 189 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 190 | ; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count. |
| 191 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 192 | ; |
| 193 | entry: |
| 194 | br label %loop |
| 195 | |
| 196 | loop: |
| 197 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 198 | %iv.inc = add nsw i32 %iv, 1 |
| 199 | %becond = icmp ule i32 %iv.inc, %n |
| 200 | %or = or i1 false, %becond |
| 201 | br i1 %or, label %loop, label %leave |
| 202 | |
| 203 | leave: |
| 204 | ret void |
| 205 | } |
| 206 | |
| 207 | define void @unsimplified_or4(i32 %n) { |
| 208 | ; CHECK-LABEL: 'unsimplified_or4' |
| 209 | ; CHECK-NEXT: Classifying expressions for: @unsimplified_or4 |
| 210 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 211 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 212 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 213 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 214 | ; CHECK-NEXT: %or = or i1 %becond, false |
| 215 | ; CHECK-NEXT: --> %becond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 216 | ; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or4 |
| 217 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 218 | ; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count. |
| 219 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 220 | ; |
| 221 | entry: |
| 222 | br label %loop |
| 223 | |
| 224 | loop: |
| 225 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 226 | %iv.inc = add nsw i32 %iv, 1 |
| 227 | %becond = icmp ule i32 %iv.inc, %n |
| 228 | %or = or i1 %becond, false |
| 229 | br i1 %or, label %loop, label %leave |
| 230 | |
| 231 | leave: |
| 232 | ret void |
| 233 | } |
| 234 | |
| 235 | define void @reversed_and1(i32 %n) { |
| 236 | ; CHECK-LABEL: 'reversed_and1' |
| 237 | ; CHECK-NEXT: Classifying expressions for: @reversed_and1 |
| 238 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 239 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 240 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 241 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 242 | ; CHECK-NEXT: %and = and i1 %becond, true |
| 243 | ; CHECK-NEXT: --> %becond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 244 | ; CHECK-NEXT: Determining loop execution counts for: @reversed_and1 |
| 245 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 246 | ; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count. |
| 247 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 248 | ; |
| 249 | entry: |
| 250 | br label %loop |
| 251 | |
| 252 | loop: |
| 253 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 254 | %iv.inc = add nsw i32 %iv, 1 |
| 255 | %becond = icmp ugt i32 %iv.inc, %n |
| 256 | %and = and i1 %becond, true |
| 257 | br i1 %and, label %leave, label %loop |
| 258 | |
| 259 | leave: |
| 260 | ret void |
| 261 | } |
| 262 | |
| 263 | define void @reversed_and2(i32 %n) { |
| 264 | ; CHECK-LABEL: 'reversed_and2' |
| 265 | ; CHECK-NEXT: Classifying expressions for: @reversed_and2 |
| 266 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 267 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 268 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 269 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 270 | ; CHECK-NEXT: %and = and i1 true, %becond |
| 271 | ; CHECK-NEXT: --> %and U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 272 | ; CHECK-NEXT: Determining loop execution counts for: @reversed_and2 |
| 273 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 274 | ; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count. |
| 275 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 276 | ; |
| 277 | entry: |
| 278 | br label %loop |
| 279 | |
| 280 | loop: |
| 281 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 282 | %iv.inc = add nsw i32 %iv, 1 |
| 283 | %becond = icmp ugt i32 %iv.inc, %n |
| 284 | %and = and i1 true, %becond |
| 285 | br i1 %and, label %leave, label %loop |
| 286 | |
| 287 | leave: |
| 288 | ret void |
| 289 | } |
| 290 | |
| 291 | define void @reversed_and3(i32 %n) { |
| 292 | ; CHECK-LABEL: 'reversed_and3' |
| 293 | ; CHECK-NEXT: Classifying expressions for: @reversed_and3 |
| 294 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 295 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 296 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 297 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 298 | ; CHECK-NEXT: %and = and i1 false, %becond |
| 299 | ; CHECK-NEXT: --> %and U: [0,-1) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 300 | ; CHECK-NEXT: Determining loop execution counts for: @reversed_and3 |
| 301 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 302 | ; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count. |
| 303 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 304 | ; |
| 305 | entry: |
| 306 | br label %loop |
| 307 | |
| 308 | loop: |
| 309 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 310 | %iv.inc = add nsw i32 %iv, 1 |
| 311 | %becond = icmp ugt i32 %iv.inc, %n |
| 312 | %and = and i1 false, %becond |
| 313 | br i1 %and, label %leave, label %loop |
| 314 | |
| 315 | leave: |
| 316 | ret void |
| 317 | } |
| 318 | |
| 319 | define void @reversed_and4(i32 %n) { |
| 320 | ; CHECK-LABEL: 'reversed_and4' |
| 321 | ; CHECK-NEXT: Classifying expressions for: @reversed_and4 |
| 322 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 323 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 324 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 325 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 326 | ; CHECK-NEXT: %and = and i1 %becond, false |
| 327 | ; CHECK-NEXT: --> false U: [0,-1) S: [0,-1) Exits: false LoopDispositions: { %loop: Invariant } |
| 328 | ; CHECK-NEXT: Determining loop execution counts for: @reversed_and4 |
| 329 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 330 | ; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count. |
| 331 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 332 | ; |
| 333 | entry: |
| 334 | br label %loop |
| 335 | |
| 336 | loop: |
| 337 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 338 | %iv.inc = add nsw i32 %iv, 1 |
| 339 | %becond = icmp ugt i32 %iv.inc, %n |
| 340 | %and = and i1 %becond, false |
| 341 | br i1 %and, label %leave, label %loop |
| 342 | |
| 343 | leave: |
| 344 | ret void |
| 345 | } |
| 346 | |
| 347 | define void @reversed_or1(i32 %n) { |
| 348 | ; CHECK-LABEL: 'reversed_or1' |
| 349 | ; CHECK-NEXT: Classifying expressions for: @reversed_or1 |
| 350 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 351 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } |
| 352 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 353 | ; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } |
| 354 | ; CHECK-NEXT: %or = or i1 %becond, true |
| 355 | ; CHECK-NEXT: --> %or U: [-1,0) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 356 | ; CHECK-NEXT: Determining loop execution counts for: @reversed_or1 |
| 357 | ; CHECK-NEXT: Loop %loop: backedge-taken count is 0 |
| 358 | ; CHECK-NEXT: Loop %loop: max backedge-taken count is 0 |
| 359 | ; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is 0 |
| 360 | ; CHECK-NEXT: Predicates: |
| 361 | ; CHECK: Loop %loop: Trip multiple is 1 |
| 362 | ; |
| 363 | entry: |
| 364 | br label %loop |
| 365 | |
| 366 | loop: |
| 367 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 368 | %iv.inc = add nsw i32 %iv, 1 |
| 369 | %becond = icmp ugt i32 %iv.inc, %n |
| 370 | %or = or i1 %becond, true |
| 371 | br i1 %or, label %leave, label %loop |
| 372 | |
| 373 | leave: |
| 374 | ret void |
| 375 | } |
| 376 | |
| 377 | define void @reversed_or2(i32 %n) { |
| 378 | ; CHECK-LABEL: 'reversed_or2' |
| 379 | ; CHECK-NEXT: Classifying expressions for: @reversed_or2 |
| 380 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 381 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } |
| 382 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 383 | ; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } |
| 384 | ; CHECK-NEXT: %or = or i1 true, %becond |
| 385 | ; CHECK-NEXT: --> %or U: [-1,0) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 386 | ; CHECK-NEXT: Determining loop execution counts for: @reversed_or2 |
| 387 | ; CHECK-NEXT: Loop %loop: backedge-taken count is 0 |
| 388 | ; CHECK-NEXT: Loop %loop: max backedge-taken count is 0 |
| 389 | ; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is 0 |
| 390 | ; CHECK-NEXT: Predicates: |
| 391 | ; CHECK: Loop %loop: Trip multiple is 1 |
| 392 | ; |
| 393 | entry: |
| 394 | br label %loop |
| 395 | |
| 396 | loop: |
| 397 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 398 | %iv.inc = add nsw i32 %iv, 1 |
| 399 | %becond = icmp ugt i32 %iv.inc, %n |
| 400 | %or = or i1 true, %becond |
| 401 | br i1 %or, label %leave, label %loop |
| 402 | |
| 403 | leave: |
| 404 | ret void |
| 405 | } |
| 406 | |
| 407 | define void @reversed_or3(i32 %n) { |
| 408 | ; CHECK-LABEL: 'reversed_or3' |
| 409 | ; CHECK-NEXT: Classifying expressions for: @reversed_or3 |
| 410 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 411 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 412 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 413 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 414 | ; CHECK-NEXT: %or = or i1 false, %becond |
| 415 | ; CHECK-NEXT: --> %or U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 416 | ; CHECK-NEXT: Determining loop execution counts for: @reversed_or3 |
| 417 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 418 | ; CHECK-NEXT: Loop %loop: max backedge-taken count is -1 |
| 419 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 420 | ; |
| 421 | entry: |
| 422 | br label %loop |
| 423 | |
| 424 | loop: |
| 425 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 426 | %iv.inc = add nsw i32 %iv, 1 |
| 427 | %becond = icmp ugt i32 %iv.inc, %n |
| 428 | %or = or i1 false, %becond |
| 429 | br i1 %or, label %leave, label %loop |
| 430 | |
| 431 | leave: |
| 432 | ret void |
| 433 | } |
| 434 | |
| 435 | define void @reversed_or4(i32 %n) { |
| 436 | ; CHECK-LABEL: 'reversed_or4' |
| 437 | ; CHECK-NEXT: Classifying expressions for: @reversed_or4 |
| 438 | ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 439 | ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 440 | ; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1 |
| 441 | ; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable } |
| 442 | ; CHECK-NEXT: %or = or i1 %becond, false |
| 443 | ; CHECK-NEXT: --> %becond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant } |
| 444 | ; CHECK-NEXT: Determining loop execution counts for: @reversed_or4 |
| 445 | ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count. |
| 446 | ; CHECK-NEXT: Loop %loop: max backedge-taken count is -1 |
| 447 | ; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count. |
| 448 | ; |
| 449 | entry: |
| 450 | br label %loop |
| 451 | |
| 452 | loop: |
| 453 | %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ] |
| 454 | %iv.inc = add nsw i32 %iv, 1 |
| 455 | %becond = icmp ugt i32 %iv.inc, %n |
| 456 | %or = or i1 %becond, false |
| 457 | br i1 %or, label %leave, label %loop |
| 458 | |
| 459 | leave: |
| 460 | ret void |
| 461 | } |