Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 3a8c2c1e6cb2ab2fb71c28740c9b085cc812bcd6 / . / llvm / test / Transforms / InstCombine / icmp-shr.ll
blob: 36490e5d10a5b793951769e4f93cff3e81690dd8 [file] [log] [blame]
Suyog Sarda3a8c2c12014-07-22 19:19:36 +0000[diff] [blame^]1; RUN: opt < %s -instcombine -S | FileCheck %s
2
3target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32:32-p3:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
4
5; CHECK-LABEL: @exact_lshr_eq_both_zero
6; CHECK-NEXT: ret i1 true
7define i1 @exact_lshr_eq_both_zero(i8 %a) {
8 %shr = lshr exact i8 0, %a
9 %cmp = icmp eq i8 %shr, 0
10 ret i1 %cmp
11}
12
13; CHECK-LABEL: @exact_ashr_eq_both_zero
14; CHECK-NEXT: ret i1 true
15define i1 @exact_ashr_eq_both_zero(i8 %a) {
16 %shr = ashr exact i8 0, %a
17 %cmp = icmp eq i8 %shr, 0
18 ret i1 %cmp
19}
20
21; CHECK-LABEL: @nonexact_lshr_eq_both_zero
22; CHECK-NEXT: ret i1 true
23define i1 @nonexact_lshr_eq_both_zero(i8 %a) {
24 %shr = lshr i8 0, %a
25 %cmp = icmp eq i8 %shr, 0
26 ret i1 %cmp
27}
28
29; CHECK-LABEL: @nonexact_ashr_eq_both_zero
30; CHECK-NEXT: ret i1 true
31define i1 @nonexact_ashr_eq_both_zero(i8 %a) {
32 %shr = ashr i8 0, %a
33 %cmp = icmp eq i8 %shr, 0
34 ret i1 %cmp
35}
36
37; CHECK-LABEL: @exact_lshr_ne_both_zero
38; CHECK-NEXT: ret i1 false
39define i1 @exact_lshr_ne_both_zero(i8 %a) {
40 %shr = lshr exact i8 0, %a
41 %cmp = icmp ne i8 %shr, 0
42 ret i1 %cmp
43}
44
45; CHECK-LABEL: @exact_ashr_ne_both_zero
46; CHECK-NEXT: ret i1 false
47define i1 @exact_ashr_ne_both_zero(i8 %a) {
48 %shr = ashr exact i8 0, %a
49 %cmp = icmp ne i8 %shr, 0
50 ret i1 %cmp
51}
52
53; CHECK-LABEL: @nonexact_lshr_ne_both_zero
54; CHECK-NEXT: ret i1 false
55define i1 @nonexact_lshr_ne_both_zero(i8 %a) {
56 %shr = lshr i8 0, %a
57 %cmp = icmp ne i8 %shr, 0
58 ret i1 %cmp
59}
60
61; CHECK-LABEL: @nonexact_ashr_ne_both_zero
62; CHECK-NEXT: ret i1 false
63define i1 @nonexact_ashr_ne_both_zero(i8 %a) {
64 %shr = ashr i8 0, %a
65 %cmp = icmp ne i8 %shr, 0
66 ret i1 %cmp
67}
68
69; CHECK-LABEL: @exact_lshr_eq_last_zero
70; CHECK-NEXT: ret i1 false
71define i1 @exact_lshr_eq_last_zero(i8 %a) {
72 %shr = lshr exact i8 128, %a
73 %cmp = icmp eq i8 %shr, 0
74 ret i1 %cmp
75}
76
77; CHECK-LABEL: @exact_ashr_eq_last_zero
78; CHECK-NEXT: ret i1 false
79define i1 @exact_ashr_eq_last_zero(i8 %a) {
80 %shr = ashr exact i8 -128, %a
81 %cmp = icmp eq i8 %shr, 0
82 ret i1 %cmp
83}
84
85; CHECK-LABEL: @exact_lshr_ne_last_zero
86; CHECK-NEXT: ret i1 true
87define i1 @exact_lshr_ne_last_zero(i8 %a) {
88 %shr = lshr exact i8 128, %a
89 %cmp = icmp ne i8 %shr, 0
90 ret i1 %cmp
91}
92
93; CHECK-LABEL: @exact_ashr_ne_last_zero
94; CHECK-NEXT: ret i1 true
95define i1 @exact_ashr_ne_last_zero(i8 %a) {
96 %shr = ashr exact i8 -128, %a
97 %cmp = icmp ne i8 %shr, 0
98 ret i1 %cmp
99}
100
101; CHECK-LABEL: @nonexact_lshr_eq_last_zero
102; CHECK-NEXT: ret i1 false
103define i1 @nonexact_lshr_eq_last_zero(i8 %a) {
104 %shr = lshr i8 128, %a
105 %cmp = icmp eq i8 %shr, 0
106 ret i1 %cmp
107}
108
109; CHECK-LABEL: @nonexact_ashr_eq_last_zero
110; CHECK-NEXT: ret i1 false
111define i1 @nonexact_ashr_eq_last_zero(i8 %a) {
112 %shr = ashr i8 -128, %a
113 %cmp = icmp eq i8 %shr, 0
114 ret i1 %cmp
115}
116
117; CHECK-LABEL: @nonexact_lshr_ne_last_zero
118; CHECK-NEXT: ret i1 true
119define i1 @nonexact_lshr_ne_last_zero(i8 %a) {
120 %shr = lshr i8 128, %a
121 %cmp = icmp ne i8 %shr, 0
122 ret i1 %cmp
123}
124
125; CHECK-LABEL: @nonexact_ashr_ne_last_zero
126; CHECK-NEXT: ret i1 true
127define i1 @nonexact_ashr_ne_last_zero(i8 %a) {
128 %shr = ashr i8 -128, %a
129 %cmp = icmp ne i8 %shr, 0
130 ret i1 %cmp
131}
132
133; CHECK-LABEL: @lshr_eq_msb_low_last_zero
134; CHECK-NEXT: icmp ugt i8 %a, 6
135define i1 @lshr_eq_msb_low_last_zero(i8 %a) {
136 %shr = lshr i8 127, %a
137 %cmp = icmp eq i8 %shr, 0
138 ret i1 %cmp
139}
140
141; CHECK-LABEL: @ashr_eq_msb_low_second_zero
142; CHECK-NEXT: icmp ugt i8 %a, 6
143define i1 @ashr_eq_msb_low_second_zero(i8 %a) {
144 %shr = ashr i8 127, %a
145 %cmp = icmp eq i8 %shr, 0
146 ret i1 %cmp
147}
148
149; CHECK-LABEL: @lshr_ne_msb_low_last_zero
150; CHECK-NEXT: icmp ult i8 %a, 7
151define i1 @lshr_ne_msb_low_last_zero(i8 %a) {
152 %shr = lshr i8 127, %a
153 %cmp = icmp ne i8 %shr, 0
154 ret i1 %cmp
155}
156
157; CHECK-LABEL: @ashr_ne_msb_low_second_zero
158; CHECK-NEXT: icmp ult i8 %a, 7
159define i1 @ashr_ne_msb_low_second_zero(i8 %a) {
160 %shr = ashr i8 127, %a
161 %cmp = icmp ne i8 %shr, 0
162 ret i1 %cmp
163}
164
165; CHECK-LABEL: @lshr_eq_first_zero
166; CHECK-NEXT: ret i1 false
167define i1 @lshr_eq_first_zero(i8 %a) {
168 %shr = lshr i8 0, %a
169 %cmp = icmp eq i8 %shr, 2
170 ret i1 %cmp
171}
172
173; CHECK-LABEL: @ashr_eq_first_zero
174; CHECK-NEXT: ret i1 false
175define i1 @ashr_eq_first_zero(i8 %a) {
176 %shr = ashr i8 0, %a
177 %cmp = icmp eq i8 %shr, 2
178 ret i1 %cmp
179}
180
181; CHECK-LABEL: @lshr_ne_first_zero
182; CHECK-NEXT: ret i1 true
183define i1 @lshr_ne_first_zero(i8 %a) {
184 %shr = lshr i8 0, %a
185 %cmp = icmp ne i8 %shr, 2
186 ret i1 %cmp
187}
188
189; CHECK-LABEL: @ashr_ne_first_zero
190; CHECK-NEXT: ret i1 true
191define i1 @ashr_ne_first_zero(i8 %a) {
192 %shr = ashr i8 0, %a
193 %cmp = icmp ne i8 %shr, 2
194 ret i1 %cmp
195}
196
197; CHECK-LABEL: @ashr_eq_both_minus1
198; CHECK-NEXT: ret i1 true
199define i1 @ashr_eq_both_minus1(i8 %a) {
200 %shr = ashr i8 -1, %a
201 %cmp = icmp eq i8 %shr, -1
202 ret i1 %cmp
203}
204
205; CHECK-LABEL: @ashr_ne_both_minus1
206; CHECK-NEXT: ret i1 false
207define i1 @ashr_ne_both_minus1(i8 %a) {
208 %shr = ashr i8 -1, %a
209 %cmp = icmp ne i8 %shr, -1
210 ret i1 %cmp
211}
212
213; CHECK-LABEL: @exact_ashr_eq_both_minus1
214; CHECK-NEXT: ret i1 true
215define i1 @exact_ashr_eq_both_minus1(i8 %a) {
216 %shr = ashr exact i8 -1, %a
217 %cmp = icmp eq i8 %shr, -1
218 ret i1 %cmp
219}
220
221; CHECK-LABEL: @exact_ashr_ne_both_minus1
222; CHECK-NEXT: ret i1 false
223define i1 @exact_ashr_ne_both_minus1(i8 %a) {
224 %shr = ashr exact i8 -1, %a
225 %cmp = icmp ne i8 %shr, -1
226 ret i1 %cmp
227}
228
229; CHECK-LABEL: @ashr_eq_both_equal
230; CHECK-NEXT: icmp eq i8 %a, 0
231define i1 @ashr_eq_both_equal(i8 %a) {
232 %shr = ashr i8 128, %a
233 %cmp = icmp eq i8 %shr, 128
234 ret i1 %cmp
235}
236
237; CHECK-LABEL: @ashr_ne_both_equal
238; CHECK-NEXT: icmp ne i8 %a, 0
239define i1 @ashr_ne_both_equal(i8 %a) {
240 %shr = ashr i8 128, %a
241 %cmp = icmp ne i8 %shr, 128
242 ret i1 %cmp
243}
244
245; CHECK-LABEL: @lshr_eq_both_equal
246; CHECK-NEXT: icmp eq i8 %a, 0
247define i1 @lshr_eq_both_equal(i8 %a) {
248 %shr = lshr i8 127, %a
249 %cmp = icmp eq i8 %shr, 127
250 ret i1 %cmp
251}
252
253; CHECK-LABEL: @lshr_ne_both_equal
254; CHECK-NEXT: icmp ne i8 %a, 0
255define i1 @lshr_ne_both_equal(i8 %a) {
256 %shr = lshr i8 127, %a
257 %cmp = icmp ne i8 %shr, 127
258 ret i1 %cmp
259}
260
261; CHECK-LABEL: @exact_ashr_eq_both_equal
262; CHECK-NEXT: icmp eq i8 %a, 0
263define i1 @exact_ashr_eq_both_equal(i8 %a) {
264 %shr = ashr exact i8 128, %a
265 %cmp = icmp eq i8 %shr, 128
266 ret i1 %cmp
267}
268
269; CHECK-LABEL: @exact_ashr_ne_both_equal
270; CHECK-NEXT: icmp ne i8 %a, 0
271define i1 @exact_ashr_ne_both_equal(i8 %a) {
272 %shr = ashr exact i8 128, %a
273 %cmp = icmp ne i8 %shr, 128
274 ret i1 %cmp
275}
276
277; CHECK-LABEL: @exact_lshr_eq_both_equal
278; CHECK-NEXT: icmp eq i8 %a, 0
279define i1 @exact_lshr_eq_both_equal(i8 %a) {
280 %shr = lshr exact i8 126, %a
281 %cmp = icmp eq i8 %shr, 126
282 ret i1 %cmp
283}
284
285; CHECK-LABEL: @exact_lshr_ne_both_equal
286; CHECK-NEXT: icmp ne i8 %a, 0
287define i1 @exact_lshr_ne_both_equal(i8 %a) {
288 %shr = lshr exact i8 126, %a
289 %cmp = icmp ne i8 %shr, 126
290 ret i1 %cmp
291}
292
293; CHECK-LABEL: @exact_ashr_eq_opposite_msb
294; CHECK-NEXT: ret i1 false
295define i1 @exact_ashr_eq_opposite_msb(i8 %a) {
296 %shr = ashr exact i8 -128, %a
297 %cmp = icmp eq i8 %shr, 1
298 ret i1 %cmp
299}
300
301; CHECK-LABEL: @ashr_eq_opposite_msb
302; CHECK-NEXT: ret i1 false
303define i1 @ashr_eq_opposite_msb(i8 %a) {
304 %shr = ashr i8 -128, %a
305 %cmp = icmp eq i8 %shr, 1
306 ret i1 %cmp
307}
308
309; CHECK-LABEL: @exact_lshr_eq_opposite_msb
310; CHECK-NEXT: icmp eq i8 %a, 7
311define i1 @exact_lshr_eq_opposite_msb(i8 %a) {
312 %shr = lshr exact i8 -128, %a
313 %cmp = icmp eq i8 %shr, 1
314 ret i1 %cmp
315}
316
317; CHECK-LABEL: @lshr_eq_opposite_msb
318; CHECK-NEXT: icmp eq i8 %a, 7
319define i1 @lshr_eq_opposite_msb(i8 %a) {
320 %shr = lshr i8 -128, %a
321 %cmp = icmp eq i8 %shr, 1
322 ret i1 %cmp
323}
324
325; CHECK-LABEL: @exact_ashr_ne_opposite_msb
326; CHECK-NEXT: ret i1 true
327define i1 @exact_ashr_ne_opposite_msb(i8 %a) {
328 %shr = ashr exact i8 -128, %a
329 %cmp = icmp ne i8 %shr, 1
330 ret i1 %cmp
331}
332
333; CHECK-LABEL: @ashr_ne_opposite_msb
334; CHECK-NEXT: ret i1 true
335define i1 @ashr_ne_opposite_msb(i8 %a) {
336 %shr = ashr i8 -128, %a
337 %cmp = icmp ne i8 %shr, 1
338 ret i1 %cmp
339}
340
341; CHECK-LABEL: @exact_lshr_ne_opposite_msb
342; CHECK-NEXT: icmp ne i8 %a, 7
343define i1 @exact_lshr_ne_opposite_msb(i8 %a) {
344 %shr = lshr exact i8 -128, %a
345 %cmp = icmp ne i8 %shr, 1
346 ret i1 %cmp
347}
348
349; CHECK-LABEL: @lshr_ne_opposite_msb
350; CHECK-NEXT: icmp ne i8 %a, 7
351define i1 @lshr_ne_opposite_msb(i8 %a) {
352 %shr = lshr i8 -128, %a
353 %cmp = icmp ne i8 %shr, 1
354 ret i1 %cmp
355}
356
357; CHECK-LABEL: @exact_ashr_eq_shift_gt
358; CHECK-NEXT : ret i1 false
359define i1 @exact_ashr_eq_shift_gt(i8 %a) {
360 %shr = ashr exact i8 -2, %a
361 %cmp = icmp eq i8 %shr, -8
362 ret i1 %cmp
363}
364
365; CHECK-LABEL: @exact_ashr_ne_shift_gt
366; CHECK-NEXT : ret i1 true
367define i1 @exact_ashr_ne_shift_gt(i8 %a) {
368 %shr = ashr exact i8 -2, %a
369 %cmp = icmp ne i8 %shr, -8
370 ret i1 %cmp
371}
372
373; CHECK-LABEL: @nonexact_ashr_eq_shift_gt
374; CHECK-NEXT : ret i1 false
375define i1 @nonexact_ashr_eq_shift_gt(i8 %a) {
376 %shr = ashr i8 -2, %a
377 %cmp = icmp eq i8 %shr, -8
378 ret i1 %cmp
379}
380
381; CHECK-LABEL: @nonexact_ashr_ne_shift_gt
382; CHECK-NEXT : ret i1 true
383define i1 @nonexact_ashr_ne_shift_gt(i8 %a) {
384 %shr = ashr i8 -2, %a
385 %cmp = icmp ne i8 %shr, -8
386 ret i1 %cmp
387}
388
389; CHECK-LABEL: @exact_lshr_eq_shift_gt
390; CHECK-NEXT: ret i1 false
391define i1 @exact_lshr_eq_shift_gt(i8 %a) {
392 %shr = lshr exact i8 2, %a
393 %cmp = icmp eq i8 %shr, 8
394 ret i1 %cmp
395}
396
397; CHECK-LABEL: @exact_lshr_ne_shift_gt
398; CHECK-NEXT: ret i1 true
399define i1 @exact_lshr_ne_shift_gt(i8 %a) {
400 %shr = lshr exact i8 2, %a
401 %cmp = icmp ne i8 %shr, 8
402 ret i1 %cmp
403}
404
405; CHECK-LABEL: @nonexact_lshr_eq_shift_gt
406; CHECK-NEXT : ret i1 false
407define i1 @nonexact_lshr_eq_shift_gt(i8 %a) {
408 %shr = lshr i8 2, %a
409 %cmp = icmp eq i8 %shr, 8
410 ret i1 %cmp
411}
412
413; CHECK-LABEL: @nonexact_lshr_ne_shift_gt
414; CHECK-NEXT : ret i1 true
415define i1 @nonexact_lshr_ne_shift_gt(i8 %a) {
416 %shr = ashr i8 2, %a
417 %cmp = icmp ne i8 %shr, 8
418 ret i1 %cmp
419}
420
421
422
423; CHECK-LABEL: @exact_ashr_eq
424; CHECK-NEXT: icmp eq i8 %a, 7
425define i1 @exact_ashr_eq(i8 %a) {
426 %shr = ashr exact i8 -128, %a
427 %cmp = icmp eq i8 %shr, -1
428 ret i1 %cmp
429}
430
431; CHECK-LABEL: @exact_ashr_ne
432; CHECK-NEXT: icmp ne i8 %a, 7
433define i1 @exact_ashr_ne(i8 %a) {
434 %shr = ashr exact i8 -128, %a
435 %cmp = icmp ne i8 %shr, -1
436 ret i1 %cmp
437}
438
439; CHECK-LABEL: @exact_lshr_eq
440; CHECK-NEXT: icmp eq i8 %a, 2
441define i1 @exact_lshr_eq(i8 %a) {
442 %shr = lshr exact i8 4, %a
443 %cmp = icmp eq i8 %shr, 1
444 ret i1 %cmp
445}
446
447; CHECK-LABEL: @exact_lshr_ne
448; CHECK-NEXT: icmp ne i8 %a, 2
449define i1 @exact_lshr_ne(i8 %a) {
450 %shr = lshr exact i8 4, %a
451 %cmp = icmp ne i8 %shr, 1
452 ret i1 %cmp
453}
454
455; CHECK-LABEL: @nonexact_ashr_eq
456; CHECK-NEXT: icmp eq i8 %a, 7
457define i1 @nonexact_ashr_eq(i8 %a) {
458 %shr = ashr i8 -128, %a
459 %cmp = icmp eq i8 %shr, -1
460 ret i1 %cmp
461}
462
463; CHECK-LABEL: @nonexact_ashr_ne
464; CHECK-NEXT: icmp ne i8 %a, 7
465define i1 @nonexact_ashr_ne(i8 %a) {
466 %shr = ashr i8 -128, %a
467 %cmp = icmp ne i8 %shr, -1
468 ret i1 %cmp
469}
470
471; CHECK-LABEL: @nonexact_lshr_eq
472; CHECK-NEXT: icmp eq i8 %a, 2
473define i1 @nonexact_lshr_eq(i8 %a) {
474 %shr = lshr i8 4, %a
475 %cmp = icmp eq i8 %shr, 1
476 ret i1 %cmp
477}
478
479; CHECK-LABEL: @nonexact_lshr_ne
480; CHECK-NEXT: icmp ne i8 %a, 2
481define i1 @nonexact_lshr_ne(i8 %a) {
482 %shr = lshr i8 4, %a
483 %cmp = icmp ne i8 %shr, 1
484 ret i1 %cmp
485}
486
487; CHECK-LABEL: @exact_lshr_eq_exactdiv
488; CHECK-NEXT: icmp eq i8 %a, 4
489define i1 @exact_lshr_eq_exactdiv(i8 %a) {
490 %shr = lshr exact i8 80, %a
491 %cmp = icmp eq i8 %shr, 5
492 ret i1 %cmp
493}
494
495; CHECK-LABEL: @exact_lshr_ne_exactdiv
496; CHECK-NEXT: icmp ne i8 %a, 4
497define i1 @exact_lshr_ne_exactdiv(i8 %a) {
498 %shr = lshr exact i8 80, %a
499 %cmp = icmp ne i8 %shr, 5
500 ret i1 %cmp
501}
502
503; CHECK-LABEL: @nonexact_lshr_eq_exactdiv
504; CHECK-NEXT: icmp eq i8 %a, 4
505define i1 @nonexact_lshr_eq_exactdiv(i8 %a) {
506 %shr = lshr i8 80, %a
507 %cmp = icmp eq i8 %shr, 5
508 ret i1 %cmp
509}
510
511; CHECK-LABEL: @nonexact_lshr_ne_exactdiv
512; CHECK-NEXT: icmp ne i8 %a, 4
513define i1 @nonexact_lshr_ne_exactdiv(i8 %a) {
514 %shr = lshr i8 80, %a
515 %cmp = icmp ne i8 %shr, 5
516 ret i1 %cmp
517}
518
519; CHECK-LABEL: @exact_ashr_eq_exactdiv
520; CHECK-NEXT: icmp eq i8 %a, 4
521define i1 @exact_ashr_eq_exactdiv(i8 %a) {
522 %shr = ashr exact i8 -80, %a
523 %cmp = icmp eq i8 %shr, -5
524 ret i1 %cmp
525}
526
527; CHECK-LABEL: @exact_ashr_ne_exactdiv
528; CHECK-NEXT: icmp ne i8 %a, 4
529define i1 @exact_ashr_ne_exactdiv(i8 %a) {
530 %shr = ashr exact i8 -80, %a
531 %cmp = icmp ne i8 %shr, -5
532 ret i1 %cmp
533}
534
535; CHECK-LABEL: @nonexact_ashr_eq_exactdiv
536; CHECK-NEXT: icmp eq i8 %a, 4
537define i1 @nonexact_ashr_eq_exactdiv(i8 %a) {
538 %shr = ashr i8 -80, %a
539 %cmp = icmp eq i8 %shr, -5
540 ret i1 %cmp
541}
542
543; CHECK-LABEL: @nonexact_ashr_ne_exactdiv
544; CHECK-NEXT: icmp ne i8 %a, 4
545define i1 @nonexact_ashr_ne_exactdiv(i8 %a) {
546 %shr = ashr i8 -80, %a
547 %cmp = icmp ne i8 %shr, -5
548 ret i1 %cmp
549}
550
551; CHECK-LABEL: @exact_lshr_eq_noexactdiv
552; CHECK-NEXT: ret i1 false
553define i1 @exact_lshr_eq_noexactdiv(i8 %a) {
554 %shr = lshr exact i8 80, %a
555 %cmp = icmp eq i8 %shr, 31
556 ret i1 %cmp
557}
558
559; CHECK-LABEL: @exact_lshr_ne_noexactdiv
560; CHECK-NEXT: ret i1 true
561define i1 @exact_lshr_ne_noexactdiv(i8 %a) {
562 %shr = lshr exact i8 80, %a
563 %cmp = icmp ne i8 %shr, 31
564 ret i1 %cmp
565}
566
567; CHECK-LABEL: @nonexact_lshr_eq_noexactdiv
568; CHECK-NEXT: ret i1 false
569define i1 @nonexact_lshr_eq_noexactdiv(i8 %a) {
570 %shr = lshr i8 80, %a
571 %cmp = icmp eq i8 %shr, 31
572 ret i1 %cmp
573}
574
575; CHECK-LABEL: @nonexact_lshr_ne_noexactdiv
576; CHECK-NEXT: ret i1 true
577define i1 @nonexact_lshr_ne_noexactdiv(i8 %a) {
578 %shr = lshr i8 80, %a
579 %cmp = icmp ne i8 %shr, 31
580 ret i1 %cmp
581}
582
583; CHECK-LABEL: @exact_ashr_eq_noexactdiv
584; CHECK-NEXT: ret i1 false
585define i1 @exact_ashr_eq_noexactdiv(i8 %a) {
586 %shr = ashr exact i8 -80, %a
587 %cmp = icmp eq i8 %shr, -31
588 ret i1 %cmp
589}
590
591; CHECK-LABEL: @exact_ashr_ne_noexactdiv
592; CHECK-NEXT: ret i1 true
593define i1 @exact_ashr_ne_noexactdiv(i8 %a) {
594 %shr = ashr exact i8 -80, %a
595 %cmp = icmp ne i8 %shr, -31
596 ret i1 %cmp
597}
598
599; CHECK-LABEL: @nonexact_ashr_eq_noexactdiv
600; CHECK-NEXT: ret i1 false
601define i1 @nonexact_ashr_eq_noexactdiv(i8 %a) {
602 %shr = ashr i8 -80, %a
603 %cmp = icmp eq i8 %shr, -31
604 ret i1 %cmp
605}
606
607; CHECK-LABEL: @nonexact_ashr_ne_noexactdiv
608; CHECK-NEXT: ret i1 true
609define i1 @nonexact_ashr_ne_noexactdiv(i8 %a) {
610 %shr = ashr i8 -80, %a
611 %cmp = icmp ne i8 %shr, -31
612 ret i1 %cmp
613}
614
615; CHECK-LABEL: @exact_lshr_eq_noexactlog
616; CHECK-NEXT: ret i1 false
617define i1 @exact_lshr_eq_noexactlog(i8 %a) {
618 %shr = lshr exact i8 90, %a
619 %cmp = icmp eq i8 %shr, 30
620 ret i1 %cmp
621}
622
623; CHECK-LABEL: @exact_lshr_ne_noexactlog
624; CHECK-NEXT: ret i1 true
625define i1 @exact_lshr_ne_noexactlog(i8 %a) {
626 %shr = lshr exact i8 90, %a
627 %cmp = icmp ne i8 %shr, 30
628 ret i1 %cmp
629}
630
631; CHECK-LABEL: @nonexact_lshr_eq_noexactlog
632; CHECK-NEXT: ret i1 false
633define i1 @nonexact_lshr_eq_noexactlog(i8 %a) {
634 %shr = lshr i8 90, %a
635 %cmp = icmp eq i8 %shr, 30
636 ret i1 %cmp
637}
638
639; CHECK-LABEL: @nonexact_lshr_ne_noexactlog
640; CHECK-NEXT: ret i1 true
641define i1 @nonexact_lshr_ne_noexactlog(i8 %a) {
642 %shr = lshr i8 90, %a
643 %cmp = icmp ne i8 %shr, 30
644 ret i1 %cmp
645}
646
647; CHECK-LABEL: @exact_ashr_eq_noexactlog
648; CHECK-NEXT: ret i1 false
649define i1 @exact_ashr_eq_noexactlog(i8 %a) {
650 %shr = ashr exact i8 -90, %a
651 %cmp = icmp eq i8 %shr, -30
652 ret i1 %cmp
653}
654
655; CHECK-LABEL: @exact_ashr_ne_noexactlog
656; CHECK-NEXT: ret i1 true
657define i1 @exact_ashr_ne_noexactlog(i8 %a) {
658 %shr = ashr exact i8 -90, %a
659 %cmp = icmp ne i8 %shr, -30
660 ret i1 %cmp
661}
662
663; CHECK-LABEL: @nonexact_ashr_eq_noexactlog
664; CHECK-NEXT: ret i1 false
665define i1 @nonexact_ashr_eq_noexactlog(i8 %a) {
666 %shr = ashr i8 -90, %a
667 %cmp = icmp eq i8 %shr, -30
668 ret i1 %cmp
669}
670
671; CHECK-LABEL: @nonexact_ashr_ne_noexactlog
672; CHECK-NEXT: ret i1 true
673define i1 @nonexact_ashr_ne_noexactlog(i8 %a) {
674 %shr = ashr i8 -90, %a
675 %cmp = icmp ne i8 %shr, -30
676 ret i1 %cmp
677}