| Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame^] | 1 | ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s | 
|  | 2 | ; | 
|  | 3 | ; <rdar://problem/14486451> | 
|  | 4 |  | 
|  | 5 | %struct.a = type [256 x i16] | 
|  | 6 | %struct.b = type [256 x i32] | 
|  | 7 | %struct.c = type [256 x i64] | 
|  | 8 |  | 
|  | 9 | define i16 @load_halfword(%struct.a* %ctx, i32 %xor72) nounwind { | 
|  | 10 | ; CHECK-LABEL: load_halfword: | 
|  | 11 | ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8 | 
|  | 12 | ; CHECK: ldrh w0, [x0, [[REG]], lsl #1] | 
|  | 13 | %shr81 = lshr i32 %xor72, 9 | 
|  | 14 | %conv82 = zext i32 %shr81 to i64 | 
|  | 15 | %idxprom83 = and i64 %conv82, 255 | 
|  | 16 | %arrayidx86 = getelementptr inbounds %struct.a* %ctx, i64 0, i64 %idxprom83 | 
|  | 17 | %result = load i16* %arrayidx86, align 2 | 
|  | 18 | ret i16 %result | 
|  | 19 | } | 
|  | 20 |  | 
|  | 21 | define i32 @load_word(%struct.b* %ctx, i32 %xor72) nounwind { | 
|  | 22 | ; CHECK-LABEL: load_word: | 
|  | 23 | ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8 | 
|  | 24 | ; CHECK: ldr w0, [x0, [[REG]], lsl #2] | 
|  | 25 | %shr81 = lshr i32 %xor72, 9 | 
|  | 26 | %conv82 = zext i32 %shr81 to i64 | 
|  | 27 | %idxprom83 = and i64 %conv82, 255 | 
|  | 28 | %arrayidx86 = getelementptr inbounds %struct.b* %ctx, i64 0, i64 %idxprom83 | 
|  | 29 | %result = load i32* %arrayidx86, align 4 | 
|  | 30 | ret i32 %result | 
|  | 31 | } | 
|  | 32 |  | 
|  | 33 | define i64 @load_doubleword(%struct.c* %ctx, i32 %xor72) nounwind { | 
|  | 34 | ; CHECK-LABEL: load_doubleword: | 
|  | 35 | ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8 | 
|  | 36 | ; CHECK: ldr x0, [x0, [[REG]], lsl #3] | 
|  | 37 | %shr81 = lshr i32 %xor72, 9 | 
|  | 38 | %conv82 = zext i32 %shr81 to i64 | 
|  | 39 | %idxprom83 = and i64 %conv82, 255 | 
|  | 40 | %arrayidx86 = getelementptr inbounds %struct.c* %ctx, i64 0, i64 %idxprom83 | 
|  | 41 | %result = load i64* %arrayidx86, align 8 | 
|  | 42 | ret i64 %result | 
|  | 43 | } | 
|  | 44 |  | 
|  | 45 | define void @store_halfword(%struct.a* %ctx, i32 %xor72, i16 %val) nounwind { | 
|  | 46 | ; CHECK-LABEL: store_halfword: | 
|  | 47 | ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8 | 
|  | 48 | ; CHECK: strh w2, [x0, [[REG]], lsl #1] | 
|  | 49 | %shr81 = lshr i32 %xor72, 9 | 
|  | 50 | %conv82 = zext i32 %shr81 to i64 | 
|  | 51 | %idxprom83 = and i64 %conv82, 255 | 
|  | 52 | %arrayidx86 = getelementptr inbounds %struct.a* %ctx, i64 0, i64 %idxprom83 | 
|  | 53 | store i16 %val, i16* %arrayidx86, align 8 | 
|  | 54 | ret void | 
|  | 55 | } | 
|  | 56 |  | 
|  | 57 | define void @store_word(%struct.b* %ctx, i32 %xor72, i32 %val) nounwind { | 
|  | 58 | ; CHECK-LABEL: store_word: | 
|  | 59 | ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8 | 
|  | 60 | ; CHECK: str w2, [x0, [[REG]], lsl #2] | 
|  | 61 | %shr81 = lshr i32 %xor72, 9 | 
|  | 62 | %conv82 = zext i32 %shr81 to i64 | 
|  | 63 | %idxprom83 = and i64 %conv82, 255 | 
|  | 64 | %arrayidx86 = getelementptr inbounds %struct.b* %ctx, i64 0, i64 %idxprom83 | 
|  | 65 | store i32 %val, i32* %arrayidx86, align 8 | 
|  | 66 | ret void | 
|  | 67 | } | 
|  | 68 |  | 
|  | 69 | define void @store_doubleword(%struct.c* %ctx, i32 %xor72, i64 %val) nounwind { | 
|  | 70 | ; CHECK-LABEL: store_doubleword: | 
|  | 71 | ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8 | 
|  | 72 | ; CHECK: str x2, [x0, [[REG]], lsl #3] | 
|  | 73 | %shr81 = lshr i32 %xor72, 9 | 
|  | 74 | %conv82 = zext i32 %shr81 to i64 | 
|  | 75 | %idxprom83 = and i64 %conv82, 255 | 
|  | 76 | %arrayidx86 = getelementptr inbounds %struct.c* %ctx, i64 0, i64 %idxprom83 | 
|  | 77 | store i64 %val, i64* %arrayidx86, align 8 | 
|  | 78 | ret void | 
|  | 79 | } |