blob: a7664c399fbb0c505ffa1d82e71a65b4a0fd7f32 [file] [log] [blame]
Marek Olsak693e9be2016-12-09 19:49:48 +00001; RUN: llc -march=amdgcn -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s
2; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=VI-NOXNACK -check-prefix=GCN %s
Marek Olsak0f55fba2016-12-09 19:49:54 +00003
4; RUN: llc -march=amdgcn -mcpu=carrizo -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefix=VI-NOXNACK -check-prefix=GCN %s
5; RUN: llc -march=amdgcn -mcpu=stoney -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefix=VI-NOXNACK -check-prefix=GCN %s
6
Marek Olsak693e9be2016-12-09 19:49:48 +00007; RUN: llc -march=amdgcn -mcpu=carrizo -verify-machineinstrs < %s | FileCheck -check-prefix=VI-XNACK -check-prefix=GCN %s
Matt Arsenault7aad8fd2017-01-24 22:02:15 +00008; RUN: llc -march=amdgcn -mcpu=stoney -verify-machineinstrs < %s | FileCheck -check-prefix=VI-XNACK -check-prefix=GCN %s
Matt Arsenault07f65712016-07-26 16:45:50 +00009
Marek Olsak693e9be2016-12-09 19:49:48 +000010; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=HSA-CI -check-prefix=GCN %s
11; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefix=HSA-VI-NOXNACK -check-prefix=GCN %s
12; RUN: llc -march=amdgcn -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=+xnack -verify-machineinstrs < %s | FileCheck -check-prefix=HSA-VI-XNACK -check-prefix=GCN %s
Tom Stellardcaaa3aa2015-12-17 17:05:09 +000013
14; GCN-LABEL: {{^}}no_vcc_no_flat:
Marek Olsak693e9be2016-12-09 19:49:48 +000015; HSA-CI: is_xnack_enabled = 0
16; HSA-VI-NOXNACK: is_xnack_enabled = 0
17; HSA-VI-XNACK: is_xnack_enabled = 1
Matt Arsenault07f65712016-07-26 16:45:50 +000018
Marek Olsak693e9be2016-12-09 19:49:48 +000019; CI: ; NumSgprs: 8
20; VI-NOXNACK: ; NumSgprs: 8
21; VI-XNACK: ; NumSgprs: 12
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000022define amdgpu_kernel void @no_vcc_no_flat() {
Tom Stellardcaaa3aa2015-12-17 17:05:09 +000023entry:
Matt Arsenault3c7581b2017-06-08 19:03:20 +000024 call void asm sideeffect "", "~{s7}"()
Tom Stellardcaaa3aa2015-12-17 17:05:09 +000025 ret void
26}
27
28; GCN-LABEL: {{^}}vcc_no_flat:
Marek Olsak693e9be2016-12-09 19:49:48 +000029; HSA-CI: is_xnack_enabled = 0
30; HSA-VI-NOXNACK: is_xnack_enabled = 0
31; HSA-VI-XNACK: is_xnack_enabled = 1
Matt Arsenault07f65712016-07-26 16:45:50 +000032
Marek Olsak693e9be2016-12-09 19:49:48 +000033; CI: ; NumSgprs: 10
34; VI-NOXNACK: ; NumSgprs: 10
35; VI-XNACK: ; NumSgprs: 12
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000036define amdgpu_kernel void @vcc_no_flat() {
Tom Stellardcaaa3aa2015-12-17 17:05:09 +000037entry:
Matt Arsenault3c7581b2017-06-08 19:03:20 +000038 call void asm sideeffect "", "~{s7},~{vcc}"()
Tom Stellardcaaa3aa2015-12-17 17:05:09 +000039 ret void
40}
41
42; GCN-LABEL: {{^}}no_vcc_flat:
Marek Olsak693e9be2016-12-09 19:49:48 +000043; HSA-CI: is_xnack_enabled = 0
44; HSA-VI-NOXNACK: is_xnack_enabled = 0
45; HSA-VI-XNACK: is_xnack_enabled = 1
Matt Arsenault07f65712016-07-26 16:45:50 +000046
Matt Arsenaulta3566f22017-04-17 19:48:30 +000047; CI: ; NumSgprs: 12
48; VI-NOXNACK: ; NumSgprs: 14
49; VI-XNACK: ; NumSgprs: 14
50; HSA-CI: ; NumSgprs: 12
51; HSA-VI-NOXNACK: ; NumSgprs: 14
52; HSA-VI-XNACK: ; NumSgprs: 14
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000053define amdgpu_kernel void @no_vcc_flat() {
Tom Stellardcaaa3aa2015-12-17 17:05:09 +000054entry:
Matt Arsenault3c7581b2017-06-08 19:03:20 +000055 call void asm sideeffect "", "~{s7},~{flat_scratch}"()
Tom Stellardcaaa3aa2015-12-17 17:05:09 +000056 ret void
57}
58
59; GCN-LABEL: {{^}}vcc_flat:
Matt Arsenault07f65712016-07-26 16:45:50 +000060; HSA-NOXNACK: is_xnack_enabled = 0
61; HSA-XNACK: is_xnack_enabled = 1
62
Matt Arsenaulta3566f22017-04-17 19:48:30 +000063; CI: ; NumSgprs: 12
64; VI-NOXNACK: ; NumSgprs: 14
65; VI-XNACK: ; NumSgprs: 14
66; HSA-CI: ; NumSgprs: 12
67; HSA-VI-NOXNACK: ; NumSgprs: 14
68; HSA-VI-XNACK: ; NumSgprs: 14
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000069define amdgpu_kernel void @vcc_flat() {
Tom Stellardcaaa3aa2015-12-17 17:05:09 +000070entry:
Matt Arsenault3c7581b2017-06-08 19:03:20 +000071 call void asm sideeffect "", "~{s7},~{vcc},~{flat_scratch}"()
Tom Stellardcaaa3aa2015-12-17 17:05:09 +000072 ret void
73}
Matt Arsenaulta3566f22017-04-17 19:48:30 +000074
75; Make sure used SGPR count for flat_scr is correct when there is no
76; scratch usage and implicit flat uses.
77
78; GCN-LABEL: {{^}}use_flat_scr:
79; CI: NumSgprs: 4
80; VI-NOXNACK: NumSgprs: 6
81; VI-XNACK: NumSgprs: 6
82define amdgpu_kernel void @use_flat_scr() #0 {
83entry:
Matt Arsenault3c7581b2017-06-08 19:03:20 +000084 call void asm sideeffect "; clobber ", "~{flat_scratch}"()
Matt Arsenaulta3566f22017-04-17 19:48:30 +000085 ret void
86}
87
88; GCN-LABEL: {{^}}use_flat_scr_lo:
89; CI: NumSgprs: 4
90; VI-NOXNACK: NumSgprs: 6
91; VI-XNACK: NumSgprs: 6
92define amdgpu_kernel void @use_flat_scr_lo() #0 {
93entry:
Matt Arsenault3c7581b2017-06-08 19:03:20 +000094 call void asm sideeffect "; clobber ", "~{flat_scratch_lo}"()
Matt Arsenaulta3566f22017-04-17 19:48:30 +000095 ret void
96}
97
98; GCN-LABEL: {{^}}use_flat_scr_hi:
99; CI: NumSgprs: 4
100; VI-NOXNACK: NumSgprs: 6
101; VI-XNACK: NumSgprs: 6
102define amdgpu_kernel void @use_flat_scr_hi() #0 {
103entry:
Matt Arsenault3c7581b2017-06-08 19:03:20 +0000104 call void asm sideeffect "; clobber ", "~{flat_scratch_hi}"()
Matt Arsenaulta3566f22017-04-17 19:48:30 +0000105 ret void
106}
107
108attributes #0 = { nounwind }