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Vincent Lejeune68b6b6d2013-03-05 18:41:32 +00001//===-- R600MachineScheduler.h - R600 Scheduler Interface -*- C++ -*-------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief R600 Machine Scheduler interface
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef R600MACHINESCHEDULER_H_
16#define R600MACHINESCHEDULER_H_
17
18#include "R600InstrInfo.h"
19#include "llvm/CodeGen/MachineScheduler.h"
20#include "llvm/Support/Debug.h"
21#include "llvm/ADT/PriorityQueue.h"
22
23using namespace llvm;
24
25namespace llvm {
26
Vincent Lejeune68b6b6d2013-03-05 18:41:32 +000027class R600SchedStrategy : public MachineSchedStrategy {
28
29 const ScheduleDAGMI *DAG;
30 const R600InstrInfo *TII;
31 const R600RegisterInfo *TRI;
32 MachineRegisterInfo *MRI;
33
Vincent Lejeune68b6b6d2013-03-05 18:41:32 +000034 enum InstKind {
35 IDAlu,
36 IDFetch,
37 IDOther,
38 IDLast
39 };
40
41 enum AluKind {
42 AluAny,
43 AluT_X,
44 AluT_Y,
45 AluT_Z,
46 AluT_W,
47 AluT_XYZW,
Vincent Lejeune3d5118c2013-05-17 16:50:56 +000048 AluPredX,
Vincent Lejeune68b6b6d2013-03-05 18:41:32 +000049 AluDiscarded, // LLVM Instructions that are going to be eliminated
50 AluLast
51 };
52
Vincent Lejeune4c81d4d2013-05-17 16:50:44 +000053 std::vector<SUnit *> Available[IDLast], Pending[IDLast];
54 std::vector<SUnit *> AvailableAlus[AluLast];
Vincent Lejeune68b6b6d2013-03-05 18:41:32 +000055
56 InstKind CurInstKind;
57 int CurEmitted;
58 InstKind NextInstKind;
59
60 int InstKindLimit[IDLast];
61
62 int OccupedSlotsMask;
63
64public:
65 R600SchedStrategy() :
66 DAG(0), TII(0), TRI(0), MRI(0) {
Vincent Lejeune68b6b6d2013-03-05 18:41:32 +000067 }
68
69 virtual ~R600SchedStrategy() {
Vincent Lejeune68b6b6d2013-03-05 18:41:32 +000070 }
71
72 virtual void initialize(ScheduleDAGMI *dag);
73 virtual SUnit *pickNode(bool &IsTopNode);
74 virtual void schedNode(SUnit *SU, bool IsTopNode);
75 virtual void releaseTopNode(SUnit *SU);
76 virtual void releaseBottomNode(SUnit *SU);
77
78private:
Vincent Lejeune0a22bc42013-03-14 15:50:45 +000079 std::vector<MachineInstr *> InstructionsGroupCandidate;
Vincent Lejeune68b6b6d2013-03-05 18:41:32 +000080
81 int getInstKind(SUnit *SU);
82 bool regBelongsToClass(unsigned Reg, const TargetRegisterClass *RC) const;
83 AluKind getAluKind(SUnit *SU) const;
84 void LoadAlu();
85 bool isAvailablesAluEmpty() const;
86 SUnit *AttemptFillSlot (unsigned Slot);
87 void PrepareNextSlot();
Vincent Lejeune4c81d4d2013-05-17 16:50:44 +000088 SUnit *PopInst(std::vector<SUnit*> &Q);
Vincent Lejeune68b6b6d2013-03-05 18:41:32 +000089
90 void AssignSlot(MachineInstr *MI, unsigned Slot);
91 SUnit* pickAlu();
92 SUnit* pickOther(int QID);
Vincent Lejeune4c81d4d2013-05-17 16:50:44 +000093 void MoveUnits(std::vector<SUnit *> &QSrc, std::vector<SUnit *> &QDst);
Vincent Lejeune68b6b6d2013-03-05 18:41:32 +000094};
95
96} // namespace llvm
97
98#endif /* R600MACHINESCHEDULER_H_ */