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Nicolai Haehnle67624af2016-10-14 10:30:00 +00001; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2
3; GCN-LABEL: {{^}}test_i128_vreg:
4; GCN: v_add_i32_e32 v[[LO:[0-9]+]], vcc,
5; GCN-NEXT: v_addc_u32_e32 v{{[0-9]+}}, vcc, v{{[0-9]+}}, v{{[0-9]+}}, vcc
6; GCN-NEXT: v_addc_u32_e32 v{{[0-9]+}}, vcc, v{{[0-9]+}}, v{{[0-9]+}}, vcc
7; GCN-NEXT: v_addc_u32_e32 v[[HI:[0-9]+]], vcc, v{{[0-9]+}}, v{{[0-9]+}}, vcc
8; GCN: buffer_store_dwordx4 v{{\[}}[[LO]]:[[HI]]],
Matt Arsenault3dbeefa2017-03-21 21:39:51 +00009define amdgpu_kernel void @test_i128_vreg(i128 addrspace(1)* noalias %out, i128 addrspace(1)* noalias %inA, i128 addrspace(1)* noalias %inB) {
Nicolai Haehnle67624af2016-10-14 10:30:00 +000010 %tid = call i32 @llvm.amdgcn.workitem.id.x() readnone
11 %a_ptr = getelementptr i128, i128 addrspace(1)* %inA, i32 %tid
12 %b_ptr = getelementptr i128, i128 addrspace(1)* %inB, i32 %tid
13 %a = load i128, i128 addrspace(1)* %a_ptr
14 %b = load i128, i128 addrspace(1)* %b_ptr
15 %result = add i128 %a, %b
16 store i128 %result, i128 addrspace(1)* %out
17 ret void
18}
19
20; Check that the SGPR add operand is correctly moved to a VGPR.
21; GCN-LABEL: {{^}}sgpr_operand:
22; GCN: v_add_i32
23; GCN: v_addc_u32
24; GCN: v_addc_u32
25; GCN: v_addc_u32
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000026define amdgpu_kernel void @sgpr_operand(i128 addrspace(1)* noalias %out, i128 addrspace(1)* noalias %in, i128 %a) {
Nicolai Haehnle67624af2016-10-14 10:30:00 +000027 %foo = load i128, i128 addrspace(1)* %in, align 8
28 %result = add i128 %foo, %a
29 store i128 %result, i128 addrspace(1)* %out
30 ret void
31}
32
33; GCN-LABEL: {{^}}sgpr_operand_reversed:
34; GCN: v_add_i32
35; GCN: v_addc_u32
36; GCN: v_addc_u32
37; GCN: v_addc_u32
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000038define amdgpu_kernel void @sgpr_operand_reversed(i128 addrspace(1)* noalias %out, i128 addrspace(1)* noalias %in, i128 %a) {
Nicolai Haehnle67624af2016-10-14 10:30:00 +000039 %foo = load i128, i128 addrspace(1)* %in, align 8
40 %result = add i128 %a, %foo
41 store i128 %result, i128 addrspace(1)* %out
42 ret void
43}
44
45; GCN-LABEL: {{^}}test_sreg:
46; GCN: s_add_u32
47; GCN: s_addc_u32
48; GCN: s_addc_u32
49; GCN: s_addc_u32
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000050define amdgpu_kernel void @test_sreg(i128 addrspace(1)* noalias %out, i128 %a, i128 %b) {
Nicolai Haehnle67624af2016-10-14 10:30:00 +000051 %result = add i128 %a, %b
52 store i128 %result, i128 addrspace(1)* %out
53 ret void
54}
55
56declare i32 @llvm.amdgcn.workitem.id.x() readnone