blob: bd6fea587b42fdb5b24a3d77f7c26530e7718da0 [file] [log] [blame]
Matt Arsenaultd1097a32016-06-02 19:54:26 +00001; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GCN-NOHSA -check-prefix=FUNC %s
2; RUN: llc -mtriple=amdgcn-amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GCN-HSA -check-prefix=FUNC %s
Matt Arsenault7aad8fd2017-01-24 22:02:15 +00003; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GCN-NOHSA -check-prefix=FUNC %s
Matt Arsenaultd1097a32016-06-02 19:54:26 +00004
5; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
6; RUN: llc -march=r600 -mcpu=cayman < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
7
8; FUNC-LABEL: {{^}}global_load_f32:
9; GCN-NOHSA: buffer_load_dword v{{[0-9]+}}
10; GCN-HSA: flat_load_dword
11
12; R600: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000013define amdgpu_kernel void @global_load_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
Matt Arsenaultd1097a32016-06-02 19:54:26 +000014entry:
15 %tmp0 = load float, float addrspace(1)* %in
16 store float %tmp0, float addrspace(1)* %out
17 ret void
18}
19
20; FUNC-LABEL: {{^}}global_load_v2f32:
21; GCN-NOHSA: buffer_load_dwordx2
22; GCN-HSA: flat_load_dwordx2
23
24; R600: VTX_READ_64
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000025define amdgpu_kernel void @global_load_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in) #0 {
Matt Arsenaultd1097a32016-06-02 19:54:26 +000026entry:
27 %tmp0 = load <2 x float>, <2 x float> addrspace(1)* %in
28 store <2 x float> %tmp0, <2 x float> addrspace(1)* %out
29 ret void
30}
31
32; FUNC-LABEL: {{^}}global_load_v3f32:
33; GCN-NOHSA: buffer_load_dwordx4
34; GCN-HSA: flat_load_dwordx4
35
36; R600: VTX_READ_128
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000037define amdgpu_kernel void @global_load_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %in) #0 {
Matt Arsenaultd1097a32016-06-02 19:54:26 +000038entry:
39 %tmp0 = load <3 x float>, <3 x float> addrspace(1)* %in
40 store <3 x float> %tmp0, <3 x float> addrspace(1)* %out
41 ret void
42}
43
44; FUNC-LABEL: {{^}}global_load_v4f32:
45; GCN-NOHSA: buffer_load_dwordx4
46; GCN-HSA: flat_load_dwordx4
47
48; R600: VTX_READ_128
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000049define amdgpu_kernel void @global_load_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) #0 {
Matt Arsenaultd1097a32016-06-02 19:54:26 +000050entry:
51 %tmp0 = load <4 x float>, <4 x float> addrspace(1)* %in
52 store <4 x float> %tmp0, <4 x float> addrspace(1)* %out
53 ret void
54}
55
56; FUNC-LABEL: {{^}}global_load_v8f32:
57; GCN-NOHSA: buffer_load_dwordx4
58; GCN-NOHSA: buffer_load_dwordx4
59; GCN-HSA: flat_load_dwordx4
60; GCN-HSA: flat_load_dwordx4
61
62; R600: VTX_READ_128
63; R600: VTX_READ_128
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000064define amdgpu_kernel void @global_load_v8f32(<8 x float> addrspace(1)* %out, <8 x float> addrspace(1)* %in) #0 {
Matt Arsenaultd1097a32016-06-02 19:54:26 +000065entry:
66 %tmp0 = load <8 x float>, <8 x float> addrspace(1)* %in
67 store <8 x float> %tmp0, <8 x float> addrspace(1)* %out
68 ret void
69}
70
71; FUNC-LABEL: {{^}}global_load_v16f32:
72; GCN-NOHSA: buffer_load_dwordx4
73; GCN-NOHSA: buffer_load_dwordx4
74; GCN-NOHSA: buffer_load_dwordx4
75; GCN-NOHSA: buffer_load_dwordx4
76
77; GCN-HSA: flat_load_dwordx4
78; GCN-HSA: flat_load_dwordx4
79; GCN-HSA: flat_load_dwordx4
80; GCN-HSA: flat_load_dwordx4
81
82; R600: VTX_READ_128
83; R600: VTX_READ_128
84; R600: VTX_READ_128
85; R600: VTX_READ_128
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000086define amdgpu_kernel void @global_load_v16f32(<16 x float> addrspace(1)* %out, <16 x float> addrspace(1)* %in) #0 {
Matt Arsenaultd1097a32016-06-02 19:54:26 +000087entry:
88 %tmp0 = load <16 x float>, <16 x float> addrspace(1)* %in
89 store <16 x float> %tmp0, <16 x float> addrspace(1)* %out
90 ret void
91}
92
93attributes #0 = { nounwind }