blob: ffcdac03bc74ca070cf49c75b0f7bb1fcbb32da0 [file] [log] [blame]
Matt Arsenault9c47dd52016-02-11 06:02:01 +00001; RUN: llc -march=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Jan Vesely2da0cba2016-06-09 16:04:00 +00002; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +00003
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +00004
Matt Arsenaultfabab4b2015-12-11 23:16:47 +00005; FUNC-LABEL: {{^}}v_test_imax_sge_i32:
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +00006; SI: v_max_i32_e32
Jan Vesely2da0cba2016-06-09 16:04:00 +00007
8; EG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +00009define amdgpu_kernel void @v_test_imax_sge_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +000010 %a = load i32, i32 addrspace(1)* %aptr, align 4
11 %b = load i32, i32 addrspace(1)* %bptr, align 4
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +000012 %cmp = icmp sge i32 %a, %b
13 %val = select i1 %cmp, i32 %a, i32 %b
Jan Vesely2da0cba2016-06-09 16:04:00 +000014 store i32 %val, i32 addrspace(1)* %out, align 4
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +000015 ret void
16}
17
Matt Arsenaultfabab4b2015-12-11 23:16:47 +000018; FUNC-LABEL: {{^}}v_test_imax_sge_v4i32:
19; SI: v_max_i32_e32
20; SI: v_max_i32_e32
21; SI: v_max_i32_e32
22; SI: v_max_i32_e32
Jan Vesely2da0cba2016-06-09 16:04:00 +000023
24; These could be merged into one
25; EG: MAX_INT
26; EG: MAX_INT
27; EG: MAX_INT
28; EG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000029define amdgpu_kernel void @v_test_imax_sge_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %aptr, <4 x i32> addrspace(1)* %bptr) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +000030 %a = load <4 x i32>, <4 x i32> addrspace(1)* %aptr, align 4
31 %b = load <4 x i32>, <4 x i32> addrspace(1)* %bptr, align 4
Matt Arsenaultfabab4b2015-12-11 23:16:47 +000032 %cmp = icmp sge <4 x i32> %a, %b
33 %val = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> %b
Jan Vesely2da0cba2016-06-09 16:04:00 +000034 store <4 x i32> %val, <4 x i32> addrspace(1)* %out, align 4
Matt Arsenaultfabab4b2015-12-11 23:16:47 +000035 ret void
36}
37
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +000038; FUNC-LABEL: @s_test_imax_sge_i32
39; SI: s_max_i32
Jan Vesely2da0cba2016-06-09 16:04:00 +000040
41; EG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000042define amdgpu_kernel void @s_test_imax_sge_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +000043 %cmp = icmp sge i32 %a, %b
44 %val = select i1 %cmp, i32 %a, i32 %b
45 store i32 %val, i32 addrspace(1)* %out, align 4
46 ret void
47}
48
Matt Arsenault314eac72015-03-13 16:43:48 +000049; FUNC-LABEL: {{^}}s_test_imax_sge_imm_i32:
50; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
Jan Vesely2da0cba2016-06-09 16:04:00 +000051
52; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000053define amdgpu_kernel void @s_test_imax_sge_imm_i32(i32 addrspace(1)* %out, i32 %a) nounwind {
Matt Arsenault314eac72015-03-13 16:43:48 +000054 %cmp = icmp sge i32 %a, 9
55 %val = select i1 %cmp, i32 %a, i32 9
56 store i32 %val, i32 addrspace(1)* %out, align 4
57 ret void
58}
59
Matt Arsenault10a50922015-12-19 01:39:48 +000060; FUNC-LABEL: {{^}}v_test_imax_sge_i8:
61; SI: buffer_load_sbyte
62; SI: buffer_load_sbyte
63; SI: v_max_i32_e32
Jan Vesely2da0cba2016-06-09 16:04:00 +000064
65; EG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000066define amdgpu_kernel void @v_test_imax_sge_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %aptr, i8 addrspace(1)* %bptr) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +000067 %a = load i8, i8 addrspace(1)* %aptr, align 1
68 %b = load i8, i8 addrspace(1)* %bptr, align 1
Matt Arsenault10a50922015-12-19 01:39:48 +000069 %cmp = icmp sge i8 %a, %b
70 %val = select i1 %cmp, i8 %a, i8 %b
Jan Vesely2da0cba2016-06-09 16:04:00 +000071 store i8 %val, i8 addrspace(1)* %out, align 1
Matt Arsenault10a50922015-12-19 01:39:48 +000072 ret void
73}
74
Matt Arsenault314eac72015-03-13 16:43:48 +000075; FUNC-LABEL: {{^}}s_test_imax_sgt_imm_i32:
76; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
Jan Vesely2da0cba2016-06-09 16:04:00 +000077
78; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000079define amdgpu_kernel void @s_test_imax_sgt_imm_i32(i32 addrspace(1)* %out, i32 %a) nounwind {
Matt Arsenault314eac72015-03-13 16:43:48 +000080 %cmp = icmp sgt i32 %a, 9
81 %val = select i1 %cmp, i32 %a, i32 9
82 store i32 %val, i32 addrspace(1)* %out, align 4
83 ret void
84}
85
Matt Arsenaultfabab4b2015-12-11 23:16:47 +000086; FUNC-LABEL: {{^}}s_test_imax_sgt_imm_v2i32:
87; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
88; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
Jan Vesely2da0cba2016-06-09 16:04:00 +000089
90; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
91; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000092define amdgpu_kernel void @s_test_imax_sgt_imm_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a) nounwind {
Matt Arsenaultfabab4b2015-12-11 23:16:47 +000093 %cmp = icmp sgt <2 x i32> %a, <i32 9, i32 9>
94 %val = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> <i32 9, i32 9>
95 store <2 x i32> %val, <2 x i32> addrspace(1)* %out, align 4
96 ret void
97}
Jan Vesely2da0cba2016-06-09 16:04:00 +000098
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +000099; FUNC-LABEL: @v_test_imax_sgt_i32
100; SI: v_max_i32_e32
Jan Vesely2da0cba2016-06-09 16:04:00 +0000101
102; EG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000103define amdgpu_kernel void @v_test_imax_sgt_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +0000104 %a = load i32, i32 addrspace(1)* %aptr, align 4
105 %b = load i32, i32 addrspace(1)* %bptr, align 4
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000106 %cmp = icmp sgt i32 %a, %b
107 %val = select i1 %cmp, i32 %a, i32 %b
Jan Vesely2da0cba2016-06-09 16:04:00 +0000108 store i32 %val, i32 addrspace(1)* %out, align 4
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000109 ret void
110}
111
112; FUNC-LABEL: @s_test_imax_sgt_i32
113; SI: s_max_i32
Jan Vesely2da0cba2016-06-09 16:04:00 +0000114
115; EG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000116define amdgpu_kernel void @s_test_imax_sgt_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000117 %cmp = icmp sgt i32 %a, %b
118 %val = select i1 %cmp, i32 %a, i32 %b
119 store i32 %val, i32 addrspace(1)* %out, align 4
120 ret void
121}
122
123; FUNC-LABEL: @v_test_umax_uge_i32
124; SI: v_max_u32_e32
Jan Vesely2da0cba2016-06-09 16:04:00 +0000125
126; EG: MAX_UINT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000127define amdgpu_kernel void @v_test_umax_uge_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +0000128 %a = load i32, i32 addrspace(1)* %aptr, align 4
129 %b = load i32, i32 addrspace(1)* %bptr, align 4
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000130 %cmp = icmp uge i32 %a, %b
131 %val = select i1 %cmp, i32 %a, i32 %b
Jan Vesely2da0cba2016-06-09 16:04:00 +0000132 store i32 %val, i32 addrspace(1)* %out, align 4
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000133 ret void
134}
135
136; FUNC-LABEL: @s_test_umax_uge_i32
137; SI: s_max_u32
Jan Vesely2da0cba2016-06-09 16:04:00 +0000138
139; EG: MAX_UINT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000140define amdgpu_kernel void @s_test_umax_uge_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000141 %cmp = icmp uge i32 %a, %b
142 %val = select i1 %cmp, i32 %a, i32 %b
143 store i32 %val, i32 addrspace(1)* %out, align 4
144 ret void
145}
146
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000147; FUNC-LABEL: {{^}}s_test_umax_uge_v3i32:
148; SI: s_max_u32
149; SI: s_max_u32
150; SI: s_max_u32
151; SI-NOT: s_max_u32
152; SI: s_endpgm
Jan Vesely2da0cba2016-06-09 16:04:00 +0000153
154; EG: MAX_UINT
155; EG: MAX_UINT
156; EG: MAX_UINT
157; EG-NOT: MAX_UINT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000158define amdgpu_kernel void @s_test_umax_uge_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> %a, <3 x i32> %b) nounwind {
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000159 %cmp = icmp uge <3 x i32> %a, %b
160 %val = select <3 x i1> %cmp, <3 x i32> %a, <3 x i32> %b
161 store <3 x i32> %val, <3 x i32> addrspace(1)* %out, align 4
162 ret void
163}
164
Matt Arsenault10a50922015-12-19 01:39:48 +0000165; FUNC-LABEL: {{^}}v_test_umax_uge_i8:
166; SI: buffer_load_ubyte
167; SI: buffer_load_ubyte
168; SI: v_max_u32_e32
Jan Vesely2da0cba2016-06-09 16:04:00 +0000169
170; EG: MAX_UINT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000171define amdgpu_kernel void @v_test_umax_uge_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %aptr, i8 addrspace(1)* %bptr) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +0000172 %a = load i8, i8 addrspace(1)* %aptr, align 1
173 %b = load i8, i8 addrspace(1)* %bptr, align 1
Matt Arsenault10a50922015-12-19 01:39:48 +0000174 %cmp = icmp uge i8 %a, %b
175 %val = select i1 %cmp, i8 %a, i8 %b
Jan Vesely2da0cba2016-06-09 16:04:00 +0000176 store i8 %val, i8 addrspace(1)* %out, align 1
Matt Arsenault10a50922015-12-19 01:39:48 +0000177 ret void
178}
179
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000180; FUNC-LABEL: @v_test_umax_ugt_i32
181; SI: v_max_u32_e32
Jan Vesely2da0cba2016-06-09 16:04:00 +0000182
183; EG: MAX_UINT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000184define amdgpu_kernel void @v_test_umax_ugt_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +0000185 %a = load i32, i32 addrspace(1)* %aptr, align 4
186 %b = load i32, i32 addrspace(1)* %bptr, align 4
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000187 %cmp = icmp ugt i32 %a, %b
188 %val = select i1 %cmp, i32 %a, i32 %b
Jan Vesely2da0cba2016-06-09 16:04:00 +0000189 store i32 %val, i32 addrspace(1)* %out, align 4
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000190 ret void
191}
192
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000193; FUNC-LABEL: {{^}}s_test_umax_ugt_i32:
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000194; SI: s_max_u32
Jan Vesely2da0cba2016-06-09 16:04:00 +0000195
196; EG: MAX_UINT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000197define amdgpu_kernel void @s_test_umax_ugt_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
Matt Arsenaultd28a7fd2014-11-14 18:30:06 +0000198 %cmp = icmp ugt i32 %a, %b
199 %val = select i1 %cmp, i32 %a, i32 %b
200 store i32 %val, i32 addrspace(1)* %out, align 4
201 ret void
202}
Matt Arsenault705eb8f2015-06-09 00:52:41 +0000203
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000204; FUNC-LABEL: {{^}}s_test_umax_ugt_imm_v2i32:
Tom Stellard0bc954e2016-03-30 16:35:09 +0000205; SI-DAG: s_max_u32 {{s[0-9]+}}, {{s[0-9]+}}, 15
206; SI-DAG: s_max_u32 {{s[0-9]+}}, {{s[0-9]+}}, 23
Jan Vesely2da0cba2016-06-09 16:04:00 +0000207
208; EG: MAX_UINT {{.*}}literal.{{[xyzw]}}
209; EG: MAX_UINT {{.*}}literal.{{[xyzw]}}
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000210define amdgpu_kernel void @s_test_umax_ugt_imm_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a) nounwind {
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000211 %cmp = icmp ugt <2 x i32> %a, <i32 15, i32 23>
212 %val = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> <i32 15, i32 23>
213 store <2 x i32> %val, <2 x i32> addrspace(1)* %out, align 4
214 ret void
215}
216
Matt Arsenault705eb8f2015-06-09 00:52:41 +0000217; Make sure redundant and removed
218; FUNC-LABEL: {{^}}simplify_demanded_bits_test_umax_ugt_i16:
219; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
220; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000221; SI: s_max_u32 [[MAX:s[0-9]+]], [[A]], [[B]]
Tom Stellard0bc954e2016-03-30 16:35:09 +0000222; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]]
223; SI: buffer_store_dword [[VMAX]]
Jan Vesely2da0cba2016-06-09 16:04:00 +0000224
225; EG: MAX_UINT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000226define amdgpu_kernel void @simplify_demanded_bits_test_umax_ugt_i16(i32 addrspace(1)* %out, i16 zeroext %a, i16 zeroext %b) nounwind {
Matt Arsenault705eb8f2015-06-09 00:52:41 +0000227 %a.ext = zext i16 %a to i32
228 %b.ext = zext i16 %b to i32
229 %cmp = icmp ugt i32 %a.ext, %b.ext
230 %val = select i1 %cmp, i32 %a.ext, i32 %b.ext
231 %mask = and i32 %val, 65535
232 store i32 %mask, i32 addrspace(1)* %out
233 ret void
234}
235
236; Make sure redundant sign_extend_inreg removed.
237
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000238; FUNC-LABEL: {{^}}simplify_demanded_bits_test_max_slt_i16:
Matt Arsenault705eb8f2015-06-09 00:52:41 +0000239; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
240; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000241; SI: s_max_i32 [[MAX:s[0-9]+]], [[A]], [[B]]
Tom Stellard0bc954e2016-03-30 16:35:09 +0000242; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]]
243; SI: buffer_store_dword [[VMAX]]
Jan Vesely2da0cba2016-06-09 16:04:00 +0000244
245; EG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000246define amdgpu_kernel void @simplify_demanded_bits_test_max_slt_i16(i32 addrspace(1)* %out, i16 signext %a, i16 signext %b) nounwind {
Matt Arsenault705eb8f2015-06-09 00:52:41 +0000247 %a.ext = sext i16 %a to i32
248 %b.ext = sext i16 %b to i32
249 %cmp = icmp sgt i32 %a.ext, %b.ext
250 %val = select i1 %cmp, i32 %a.ext, i32 %b.ext
251 %shl = shl i32 %val, 16
252 %sextinreg = ashr i32 %shl, 16
253 store i32 %sextinreg, i32 addrspace(1)* %out
254 ret void
255}
256
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000257; FUNC-LABEL: {{^}}s_test_imax_sge_i16:
Matt Arsenault10a50922015-12-19 01:39:48 +0000258; SI: s_load_dword
259; SI: s_load_dword
260; SI: s_sext_i32_i16
261; SI: s_sext_i32_i16
Matt Arsenaultfabab4b2015-12-11 23:16:47 +0000262; SI: s_max_i32
Jan Vesely2da0cba2016-06-09 16:04:00 +0000263
264; EG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000265define amdgpu_kernel void @s_test_imax_sge_i16(i16 addrspace(1)* %out, i16 %a, i16 %b) nounwind {
Matt Arsenault705eb8f2015-06-09 00:52:41 +0000266 %cmp = icmp sge i16 %a, %b
267 %val = select i1 %cmp, i16 %a, i16 %b
268 store i16 %val, i16 addrspace(1)* %out
269 ret void
270}
Jan Vesely2da0cba2016-06-09 16:04:00 +0000271
272; 64 bit
273; FUNC-LABEL: {{^}}test_umax_ugt_i64
274; SI: s_endpgm
275
276; EG: MAX_UINT
277; EG: MAX_UINT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000278define amdgpu_kernel void @test_umax_ugt_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +0000279 %tmp = icmp ugt i64 %a, %b
280 %val = select i1 %tmp, i64 %a, i64 %b
281 store i64 %val, i64 addrspace(1)* %out, align 8
282 ret void
283}
284
285; FUNC-LABEL: {{^}}test_umax_uge_i64
286; SI: s_endpgm
287
288; EG: MAX_UINT
289; EG: MAX_UINT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000290define amdgpu_kernel void @test_umax_uge_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +0000291 %tmp = icmp uge i64 %a, %b
292 %val = select i1 %tmp, i64 %a, i64 %b
293 store i64 %val, i64 addrspace(1)* %out, align 8
294 ret void
295}
296
297; FUNC-LABEL: {{^}}test_imax_sgt_i64
298; SI: s_endpgm
299
300; EG-DAG: MAX_UINT
301; EG-DAG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000302define amdgpu_kernel void @test_imax_sgt_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +0000303 %tmp = icmp sgt i64 %a, %b
304 %val = select i1 %tmp, i64 %a, i64 %b
305 store i64 %val, i64 addrspace(1)* %out, align 8
306 ret void
307}
308
309; FUNC-LABEL: {{^}}test_imax_sge_i64
310; SI: s_endpgm
311
312; EG-DAG: MAX_UINT
313; EG-DAG: MAX_INT
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000314define amdgpu_kernel void @test_imax_sge_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
Jan Vesely2da0cba2016-06-09 16:04:00 +0000315 %tmp = icmp sge i64 %a, %b
316 %val = select i1 %tmp, i64 %a, i64 %b
317 store i64 %val, i64 addrspace(1)* %out, align 8
318 ret void
319}