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gerrit-public.fairphone.software / toolchain / llvm-project / bfee5a9b42d3b4190d6a41d848303d1fea1bdbf2 / . / llvm / test / CodeGen / X86 / pow.ll
blob: db8ac76e09cfa1e7ddccba87512c35669f9d9d74 [file] [log] [blame]
Sanjay Patel09459592018-09-03 22:11:47 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
3
4declare float @llvm.pow.f32(float, float)
5declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
6
7declare double @llvm.pow.f64(double, double)
8declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)
9
10define float @pow_f32_one_fourth_fmf(float %x) nounwind {
11; CHECK-LABEL: pow_f32_one_fourth_fmf:
12; CHECK: # %bb.0:
Sanjay Pateldbf52832018-09-05 17:01:56 +0000[diff] [blame]13; CHECK-NEXT: rsqrtss %xmm0, %xmm1
14; CHECK-NEXT: movaps %xmm0, %xmm2
15; CHECK-NEXT: mulss %xmm1, %xmm2
16; CHECK-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
17; CHECK-NEXT: movaps %xmm2, %xmm4
18; CHECK-NEXT: mulss %xmm3, %xmm4
19; CHECK-NEXT: mulss %xmm1, %xmm2
Sanjay Patel09459592018-09-03 22:11:47 +0000[diff] [blame]20; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
Sanjay Pateldbf52832018-09-05 17:01:56 +0000[diff] [blame]21; CHECK-NEXT: addss %xmm1, %xmm2
22; CHECK-NEXT: mulss %xmm4, %xmm2
23; CHECK-NEXT: xorps %xmm4, %xmm4
24; CHECK-NEXT: cmpeqss %xmm4, %xmm0
25; CHECK-NEXT: andnps %xmm2, %xmm0
26; CHECK-NEXT: xorps %xmm2, %xmm2
27; CHECK-NEXT: rsqrtss %xmm0, %xmm2
28; CHECK-NEXT: movaps %xmm0, %xmm5
29; CHECK-NEXT: mulss %xmm2, %xmm5
30; CHECK-NEXT: mulss %xmm5, %xmm3
31; CHECK-NEXT: mulss %xmm2, %xmm5
32; CHECK-NEXT: addss %xmm1, %xmm5
33; CHECK-NEXT: mulss %xmm3, %xmm5
34; CHECK-NEXT: cmpeqss %xmm4, %xmm0
35; CHECK-NEXT: andnps %xmm5, %xmm0
36; CHECK-NEXT: retq
Sanjay Patel09459592018-09-03 22:11:47 +0000[diff] [blame]37 %r = call nsz ninf afn float @llvm.pow.f32(float %x, float 2.5e-01)
38 ret float %r
39}
40
41define double @pow_f64_one_fourth_fmf(double %x) nounwind {
42; CHECK-LABEL: pow_f64_one_fourth_fmf:
43; CHECK: # %bb.0:
Sanjay Pateldbf52832018-09-05 17:01:56 +0000[diff] [blame]44; CHECK-NEXT: sqrtsd %xmm0, %xmm0
45; CHECK-NEXT: sqrtsd %xmm0, %xmm0
46; CHECK-NEXT: retq
Sanjay Patel09459592018-09-03 22:11:47 +0000[diff] [blame]47 %r = call nsz ninf afn double @llvm.pow.f64(double %x, double 2.5e-01)
48 ret double %r
49}
50
51define <4 x float> @pow_v4f32_one_fourth_fmf(<4 x float> %x) nounwind {
52; CHECK-LABEL: pow_v4f32_one_fourth_fmf:
53; CHECK: # %bb.0:
Sanjay Pateldbf52832018-09-05 17:01:56 +0000[diff] [blame]54; CHECK-NEXT: rsqrtps %xmm0, %xmm1
55; CHECK-NEXT: movaps %xmm0, %xmm2
56; CHECK-NEXT: mulps %xmm1, %xmm2
57; CHECK-NEXT: movaps {{.*#+}} xmm3 = [-5.000000e-01,-5.000000e-01,-5.000000e-01,-5.000000e-01]
58; CHECK-NEXT: movaps %xmm2, %xmm4
59; CHECK-NEXT: mulps %xmm3, %xmm4
60; CHECK-NEXT: mulps %xmm1, %xmm2
61; CHECK-NEXT: movaps {{.*#+}} xmm1 = [-3.000000e+00,-3.000000e+00,-3.000000e+00,-3.000000e+00]
62; CHECK-NEXT: addps %xmm1, %xmm2
63; CHECK-NEXT: mulps %xmm4, %xmm2
64; CHECK-NEXT: xorps %xmm4, %xmm4
65; CHECK-NEXT: cmpneqps %xmm4, %xmm0
66; CHECK-NEXT: andps %xmm2, %xmm0
67; CHECK-NEXT: rsqrtps %xmm0, %xmm2
68; CHECK-NEXT: movaps %xmm0, %xmm5
69; CHECK-NEXT: mulps %xmm2, %xmm5
70; CHECK-NEXT: mulps %xmm5, %xmm3
71; CHECK-NEXT: mulps %xmm2, %xmm5
72; CHECK-NEXT: addps %xmm1, %xmm5
73; CHECK-NEXT: mulps %xmm3, %xmm5
74; CHECK-NEXT: cmpneqps %xmm4, %xmm0
75; CHECK-NEXT: andps %xmm5, %xmm0
Sanjay Patel09459592018-09-03 22:11:47 +0000[diff] [blame]76; CHECK-NEXT: retq
77 %r = call fast <4 x float> @llvm.pow.v4f32(<4 x float> %x, <4 x float> <float 2.5e-1, float 2.5e-1, float 2.5e-01, float 2.5e-01>)
78 ret <4 x float> %r
79}
80
81define <2 x double> @pow_v2f64_one_fourth_fmf(<2 x double> %x) nounwind {
82; CHECK-LABEL: pow_v2f64_one_fourth_fmf:
83; CHECK: # %bb.0:
Sanjay Pateldbf52832018-09-05 17:01:56 +0000[diff] [blame]84; CHECK-NEXT: sqrtpd %xmm0, %xmm0
85; CHECK-NEXT: sqrtpd %xmm0, %xmm0
Sanjay Patel09459592018-09-03 22:11:47 +0000[diff] [blame]86; CHECK-NEXT: retq
87 %r = call fast <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double 2.5e-1, double 2.5e-1>)
88 ret <2 x double> %r
89}
90
91define float @pow_f32_one_fourth_not_enough_fmf(float %x) nounwind {
92; CHECK-LABEL: pow_f32_one_fourth_not_enough_fmf:
93; CHECK: # %bb.0:
94; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
95; CHECK-NEXT: jmp powf # TAILCALL
96 %r = call afn ninf float @llvm.pow.f32(float %x, float 2.5e-01)
97 ret float %r
98}
99
100define double @pow_f64_one_fourth_not_enough_fmf(double %x) nounwind {
101; CHECK-LABEL: pow_f64_one_fourth_not_enough_fmf:
102; CHECK: # %bb.0:
103; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
104; CHECK-NEXT: jmp pow # TAILCALL
105 %r = call nsz ninf double @llvm.pow.f64(double %x, double 2.5e-01)
106 ret double %r
107}
108
109define <4 x float> @pow_v4f32_one_fourth_not_enough_fmf(<4 x float> %x) nounwind {
110; CHECK-LABEL: pow_v4f32_one_fourth_not_enough_fmf:
111; CHECK: # %bb.0:
112; CHECK-NEXT: subq $56, %rsp
113; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
114; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
115; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
116; CHECK-NEXT: callq powf
117; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
118; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
119; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
120; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
121; CHECK-NEXT: callq powf
122; CHECK-NEXT: unpcklps (%rsp), %xmm0 # 16-byte Folded Reload
123; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
124; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
125; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
126; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
127; CHECK-NEXT: callq powf
128; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
129; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
130; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,2,3]
131; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
132; CHECK-NEXT: callq powf
133; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
134; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
135; CHECK-NEXT: unpcklpd (%rsp), %xmm1 # 16-byte Folded Reload
136; CHECK-NEXT: # xmm1 = xmm1[0],mem[0]
137; CHECK-NEXT: movaps %xmm1, %xmm0
138; CHECK-NEXT: addq $56, %rsp
139; CHECK-NEXT: retq
140 %r = call afn nsz <4 x float> @llvm.pow.v4f32(<4 x float> %x, <4 x float> <float 2.5e-1, float 2.5e-1, float 2.5e-01, float 2.5e-01>)
141 ret <4 x float> %r
142}
143
144define <2 x double> @pow_v2f64_one_fourth_not_enough_fmf(<2 x double> %x) nounwind {
145; CHECK-LABEL: pow_v2f64_one_fourth_not_enough_fmf:
146; CHECK: # %bb.0:
147; CHECK-NEXT: subq $40, %rsp
148; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
149; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
150; CHECK-NEXT: callq pow
151; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
152; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
153; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
154; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
155; CHECK-NEXT: callq pow
156; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
157; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
158; CHECK-NEXT: movaps %xmm1, %xmm0
159; CHECK-NEXT: addq $40, %rsp
160; CHECK-NEXT: retq
161 %r = call nsz nnan reassoc <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double 2.5e-1, double 2.5e-1>)
162 ret <2 x double> %r
163}
164
Sanjay Patel9e5c1632018-09-06 18:42:55 +0000[diff] [blame]165define float @pow_f32_one_third_fmf(float %x) nounwind {
166; CHECK-LABEL: pow_f32_one_third_fmf:
167; CHECK: # %bb.0:
168; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
169; CHECK-NEXT: jmp powf # TAILCALL
170 %one = uitofp i32 1 to float
171 %three = uitofp i32 3 to float
172 %exp = fdiv float %one, %three
173 %r = call nsz nnan ninf afn float @llvm.pow.f32(float %x, float %exp)
174 ret float %r
175}
176
177define double @pow_f64_one_third_fmf(double %x) nounwind {
178; CHECK-LABEL: pow_f64_one_third_fmf:
179; CHECK: # %bb.0:
180; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
181; CHECK-NEXT: jmp pow # TAILCALL
182 %one = uitofp i32 1 to double
183 %three = uitofp i32 3 to double
184 %exp = fdiv double %one, %three
185 %r = call nsz nnan ninf afn double @llvm.pow.f64(double %x, double %exp)
186 ret double %r
187}
188