Tom Stellard | cb97e3a | 2013-04-15 17:51:35 +0000 | [diff] [blame] | 1 | //===-- SIDefines.h - SI Helper Macros ----------------------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | /// \file |
| 9 | //===----------------------------------------------------------------------===// |
| 10 | |
Benjamin Kramer | a7c40ef | 2014-08-13 16:26:38 +0000 | [diff] [blame] | 11 | #ifndef LLVM_LIB_TARGET_R600_SIDEFINES_H |
| 12 | #define LLVM_LIB_TARGET_R600_SIDEFINES_H |
Tom Stellard | cb97e3a | 2013-04-15 17:51:35 +0000 | [diff] [blame] | 13 | |
Tom Stellard | 16a9a20 | 2013-08-14 23:24:17 +0000 | [diff] [blame] | 14 | namespace SIInstrFlags { |
Matt Arsenault | e2fabd3 | 2014-07-29 18:51:56 +0000 | [diff] [blame] | 15 | // This needs to be kept in sync with the field bits in InstSI. |
Tom Stellard | 16a9a20 | 2013-08-14 23:24:17 +0000 | [diff] [blame] | 16 | enum { |
Michel Danzer | 20680b1 | 2013-08-16 16:19:24 +0000 | [diff] [blame] | 17 | MIMG = 1 << 3, |
Tom Stellard | 93fabce | 2013-10-10 17:11:55 +0000 | [diff] [blame] | 18 | SMRD = 1 << 4, |
| 19 | VOP1 = 1 << 5, |
| 20 | VOP2 = 1 << 6, |
| 21 | VOP3 = 1 << 7, |
Tom Stellard | 8216602 | 2013-11-13 23:36:37 +0000 | [diff] [blame] | 22 | VOPC = 1 << 8, |
Matt Arsenault | e2fabd3 | 2014-07-29 18:51:56 +0000 | [diff] [blame] | 23 | SALU = 1 << 9, |
| 24 | MUBUF = 1 << 10, |
Matt Arsenault | 3f98140 | 2014-09-15 15:41:53 +0000 | [diff] [blame^] | 25 | MTBUF = 1 << 11, |
| 26 | FLAT = 1 << 12 |
Tom Stellard | 16a9a20 | 2013-08-14 23:24:17 +0000 | [diff] [blame] | 27 | }; |
| 28 | } |
| 29 | |
Tom Stellard | cb97e3a | 2013-04-15 17:51:35 +0000 | [diff] [blame] | 30 | #define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028 |
Michel Danzer | 49812b5 | 2013-07-10 16:37:07 +0000 | [diff] [blame] | 31 | #define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C |
| 32 | #define S_00B02C_EXTRA_LDS_SIZE(x) (((x) & 0xFF) << 8) |
Tom Stellard | cb97e3a | 2013-04-15 17:51:35 +0000 | [diff] [blame] | 33 | #define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128 |
| 34 | #define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228 |
| 35 | #define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 |
| 36 | #define S_00B028_VGPRS(x) (((x) & 0x3F) << 0) |
| 37 | #define S_00B028_SGPRS(x) (((x) & 0x0F) << 6) |
Michel Danzer | 49812b5 | 2013-07-10 16:37:07 +0000 | [diff] [blame] | 38 | #define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C |
Tom Stellard | b02094e | 2014-07-21 15:45:01 +0000 | [diff] [blame] | 39 | #define S_00B02C_SCRATCH_EN(x) (((x) & 0x1) << 0) |
Michel Danzer | 49812b5 | 2013-07-10 16:37:07 +0000 | [diff] [blame] | 40 | #define S_00B84C_LDS_SIZE(x) (((x) & 0x1FF) << 15) |
Tom Stellard | cb97e3a | 2013-04-15 17:51:35 +0000 | [diff] [blame] | 41 | #define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC |
| 42 | |
Matt Arsenault | 0989d51 | 2014-06-26 17:22:30 +0000 | [diff] [blame] | 43 | |
| 44 | #define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 |
| 45 | #define S_00B848_VGPRS(x) (((x) & 0x3F) << 0) |
| 46 | #define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F) |
| 47 | #define C_00B848_VGPRS 0xFFFFFFC0 |
| 48 | #define S_00B848_SGPRS(x) (((x) & 0x0F) << 6) |
| 49 | #define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F) |
| 50 | #define C_00B848_SGPRS 0xFFFFFC3F |
| 51 | #define S_00B848_PRIORITY(x) (((x) & 0x03) << 10) |
| 52 | #define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03) |
| 53 | #define C_00B848_PRIORITY 0xFFFFF3FF |
| 54 | #define S_00B848_FLOAT_MODE(x) (((x) & 0xFF) << 12) |
| 55 | #define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF) |
| 56 | #define C_00B848_FLOAT_MODE 0xFFF00FFF |
| 57 | #define S_00B848_PRIV(x) (((x) & 0x1) << 20) |
| 58 | #define G_00B848_PRIV(x) (((x) >> 20) & 0x1) |
| 59 | #define C_00B848_PRIV 0xFFEFFFFF |
| 60 | #define S_00B848_DX10_CLAMP(x) (((x) & 0x1) << 21) |
| 61 | #define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1) |
| 62 | #define C_00B848_DX10_CLAMP 0xFFDFFFFF |
| 63 | #define S_00B848_DEBUG_MODE(x) (((x) & 0x1) << 22) |
| 64 | #define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1) |
| 65 | #define C_00B848_DEBUG_MODE 0xFFBFFFFF |
| 66 | #define S_00B848_IEEE_MODE(x) (((x) & 0x1) << 23) |
| 67 | #define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1) |
| 68 | #define C_00B848_IEEE_MODE 0xFF7FFFFF |
| 69 | |
| 70 | |
| 71 | // Helpers for setting FLOAT_MODE |
| 72 | #define FP_ROUND_ROUND_TO_NEAREST 0 |
| 73 | #define FP_ROUND_ROUND_TO_INF 1 |
| 74 | #define FP_ROUND_ROUND_TO_NEGINF 2 |
| 75 | #define FP_ROUND_ROUND_TO_ZERO 3 |
| 76 | |
| 77 | // Bits 3:0 control rounding mode. 1:0 control single precision, 3:2 double |
| 78 | // precision. |
| 79 | #define FP_ROUND_MODE_SP(x) ((x) & 0x3) |
| 80 | #define FP_ROUND_MODE_DP(x) (((x) & 0x3) << 2) |
| 81 | |
| 82 | #define FP_DENORM_FLUSH_IN_FLUSH_OUT 0 |
| 83 | #define FP_DENORM_FLUSH_OUT 1 |
| 84 | #define FP_DENORM_FLUSH_IN 2 |
| 85 | #define FP_DENORM_FLUSH_NONE 3 |
| 86 | |
| 87 | |
| 88 | // Bits 7:4 control denormal handling. 5:4 control single precision, 6:7 double |
| 89 | // precision. |
| 90 | #define FP_DENORM_MODE_SP(x) (((x) & 0x3) << 4) |
| 91 | #define FP_DENORM_MODE_DP(x) (((x) & 0x3) << 6) |
| 92 | |
Tom Stellard | b02094e | 2014-07-21 15:45:01 +0000 | [diff] [blame] | 93 | #define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860 |
| 94 | #define S_00B860_WAVESIZE(x) (((x) & 0x1FFF) << 12) |
| 95 | |
Benjamin Kramer | a7c40ef | 2014-08-13 16:26:38 +0000 | [diff] [blame] | 96 | #endif |