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Ulrich Weigand5f613df2013-05-06 16:15:19 +00001//===-- SystemZMCInstLower.cpp - Lower MachineInstr to MCInst -------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "SystemZMCInstLower.h"
11#include "SystemZAsmPrinter.h"
Rafael Espindola894843c2014-01-07 21:19:40 +000012#include "llvm/IR/Mangler.h"
Ulrich Weigand5f613df2013-05-06 16:15:19 +000013#include "llvm/MC/MCExpr.h"
Pete Cooper81902a32015-05-15 22:19:42 +000014#include "llvm/MC/MCInst.h"
Ulrich Weigand5f613df2013-05-06 16:15:19 +000015#include "llvm/MC/MCStreamer.h"
Ulrich Weigand5f613df2013-05-06 16:15:19 +000016
17using namespace llvm;
18
Ulrich Weigand5f613df2013-05-06 16:15:19 +000019// Return the VK_* enumeration for MachineOperand target flags Flags.
20static MCSymbolRefExpr::VariantKind getVariantKind(unsigned Flags) {
21 switch (Flags & SystemZII::MO_SYMBOL_MODIFIER) {
22 case 0:
23 return MCSymbolRefExpr::VK_None;
24 case SystemZII::MO_GOT:
25 return MCSymbolRefExpr::VK_GOT;
Ulrich Weigand7db69182015-02-18 09:13:27 +000026 case SystemZII::MO_INDNTPOFF:
27 return MCSymbolRefExpr::VK_INDNTPOFF;
Ulrich Weigand5f613df2013-05-06 16:15:19 +000028 }
29 llvm_unreachable("Unrecognised MO_ACCESS_MODEL");
30}
31
Rafael Espindola69c1d632013-10-29 16:18:15 +000032SystemZMCInstLower::SystemZMCInstLower(MCContext &ctx,
Ulrich Weigand5f613df2013-05-06 16:15:19 +000033 SystemZAsmPrinter &asmprinter)
Rafael Espindola69c1d632013-10-29 16:18:15 +000034 : Ctx(ctx), AsmPrinter(asmprinter) {}
Ulrich Weigand5f613df2013-05-06 16:15:19 +000035
Richard Sandifordf348f832013-09-25 10:37:17 +000036const MCExpr *
37SystemZMCInstLower::getExpr(const MachineOperand &MO,
38 MCSymbolRefExpr::VariantKind Kind) const {
39 const MCSymbol *Symbol;
40 bool HasOffset = true;
41 switch (MO.getType()) {
42 case MachineOperand::MO_MachineBasicBlock:
43 Symbol = MO.getMBB()->getSymbol();
44 HasOffset = false;
45 break;
46
47 case MachineOperand::MO_GlobalAddress:
Rafael Espindola79858aa2013-10-29 17:07:16 +000048 Symbol = AsmPrinter.getSymbol(MO.getGlobal());
Richard Sandifordf348f832013-09-25 10:37:17 +000049 break;
50
51 case MachineOperand::MO_ExternalSymbol:
52 Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName());
53 break;
54
55 case MachineOperand::MO_JumpTableIndex:
56 Symbol = AsmPrinter.GetJTISymbol(MO.getIndex());
57 HasOffset = false;
58 break;
59
60 case MachineOperand::MO_ConstantPoolIndex:
61 Symbol = AsmPrinter.GetCPISymbol(MO.getIndex());
62 break;
63
64 case MachineOperand::MO_BlockAddress:
65 Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress());
66 break;
67
68 default:
69 llvm_unreachable("unknown operand type");
Ulrich Weigand5f613df2013-05-06 16:15:19 +000070 }
Jim Grosbach13760bd2015-05-30 01:25:56 +000071 const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, Kind, Ctx);
Richard Sandifordf348f832013-09-25 10:37:17 +000072 if (HasOffset)
73 if (int64_t Offset = MO.getOffset()) {
Jim Grosbach13760bd2015-05-30 01:25:56 +000074 const MCExpr *OffsetExpr = MCConstantExpr::create(Offset, Ctx);
75 Expr = MCBinaryExpr::createAdd(Expr, OffsetExpr, Ctx);
Richard Sandifordf348f832013-09-25 10:37:17 +000076 }
77 return Expr;
Ulrich Weigand5f613df2013-05-06 16:15:19 +000078}
79
80MCOperand SystemZMCInstLower::lowerOperand(const MachineOperand &MO) const {
81 switch (MO.getType()) {
Ulrich Weigand5f613df2013-05-06 16:15:19 +000082 case MachineOperand::MO_Register:
Jim Grosbache9119e42015-05-13 18:37:00 +000083 return MCOperand::createReg(MO.getReg());
Ulrich Weigand5f613df2013-05-06 16:15:19 +000084
85 case MachineOperand::MO_Immediate:
Jim Grosbache9119e42015-05-13 18:37:00 +000086 return MCOperand::createImm(MO.getImm());
Ulrich Weigand5f613df2013-05-06 16:15:19 +000087
Richard Sandifordf348f832013-09-25 10:37:17 +000088 default: {
89 MCSymbolRefExpr::VariantKind Kind = getVariantKind(MO.getTargetFlags());
Jim Grosbache9119e42015-05-13 18:37:00 +000090 return MCOperand::createExpr(getExpr(MO, Kind));
Ulrich Weigand5f613df2013-05-06 16:15:19 +000091 }
92 }
93}
94
95void SystemZMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
Richard Sandifordf348f832013-09-25 10:37:17 +000096 OutMI.setOpcode(MI->getOpcode());
Ulrich Weigand5f613df2013-05-06 16:15:19 +000097 for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
98 const MachineOperand &MO = MI->getOperand(I);
Richard Sandifordb8204052013-07-12 09:08:12 +000099 // Ignore all implicit register operands.
100 if (!MO.isReg() || !MO.isImplicit())
101 OutMI.addOperand(lowerOperand(MO));
Ulrich Weigand5f613df2013-05-06 16:15:19 +0000102 }
103}