blob: 286bc20e1236dc05f626f7f4524bcdbc16c81a49 [file] [log] [blame]
Yi Konga44c4d72014-06-27 21:25:42 +00001/*===---- arm_acle.h - ARM Non-Neon intrinsics -----------------------------===
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 * THE SOFTWARE.
20 *
21 *===-----------------------------------------------------------------------===
22 */
23
24#ifndef __ARM_ACLE_H
25#define __ARM_ACLE_H
26
27#ifndef __ARM_ACLE
28#error "ACLE intrinsics support not enabled."
29#endif
30
31#include <stdint.h>
32
Saleem Abdulrasool60df0612014-07-08 05:46:00 +000033#if defined(__cplusplus)
34extern "C" {
35#endif
Yi Kong28d7b022014-07-17 12:45:17 +000036
Yi Kong472e5212014-07-14 15:32:29 +000037/* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */
Yi Kong28d7b022014-07-17 12:45:17 +000038/* 8.3 Memory barriers */
39#if !defined(_MSC_VER)
40#define __dmb(i) __builtin_arm_dmb(i)
41#define __dsb(i) __builtin_arm_dsb(i)
42#define __isb(i) __builtin_arm_isb(i)
43#endif
44
Yi Kong472e5212014-07-14 15:32:29 +000045/* 8.4 Hints */
Saleem Abdulrasool07257fe2014-07-12 23:27:26 +000046
47#if !defined(_MSC_VER)
48static __inline__ void __attribute__((always_inline, nodebug)) __wfi(void) {
49 __builtin_arm_wfi();
50}
51
52static __inline__ void __attribute__((always_inline, nodebug)) __wfe(void) {
53 __builtin_arm_wfe();
54}
55
56static __inline__ void __attribute__((always_inline, nodebug)) __sev(void) {
57 __builtin_arm_sev();
58}
59
60static __inline__ void __attribute__((always_inline, nodebug)) __sevl(void) {
61 __builtin_arm_sevl();
62}
63
64static __inline__ void __attribute__((always_inline, nodebug)) __yield(void) {
65 __builtin_arm_yield();
66}
67#endif
68
Yi Kong45a09312014-08-13 23:20:15 +000069/* 8.6 Memory prefetch intrinsics */
70/* 8.6.1 Data prefetch */
71#define __pld(addr) __pldx(0, 0, 0, addr)
72
73#if __ARM_32BIT_STATE
74#define __pldx(access_kind, cache_level, retention_policy, addr) \
75 __builtin_arm_prefetch(addr, access_kind, 1)
76#else
77#define __pldx(access_kind, cache_level, retention_policy, addr) \
78 __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
79#endif
80
81/* 8.6.2 Instruction prefetch */
82#define __pli(addr) __plix(0, 0, addr)
83
84#if __ARM_32BIT_STATE
85#define __plix(cache_level, retention_policy, addr) \
86 __builtin_arm_prefetch(addr, 0, 0)
87#else
88#define __plix(cache_level, retention_policy, addr) \
89 __builtin_arm_prefetch(addr, 0, cache_level, retention_policy, 0)
90#endif
91
Yi Kong472e5212014-07-14 15:32:29 +000092/* 8.7 NOP */
93static __inline__ void __attribute__((always_inline, nodebug)) __nop(void) {
94 __builtin_arm_nop();
95}
96
Yi Kong4e00ce72014-07-12 22:48:13 +000097/* 9 DATA-PROCESSING INTRINSICS */
98/* 9.2 Miscellaneous data-processing intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +000099static __inline__ uint32_t __attribute__((always_inline, nodebug))
100 __clz(uint32_t t) {
101 return __builtin_clz(t);
102}
103
104static __inline__ unsigned long __attribute__((always_inline, nodebug))
105 __clzl(unsigned long t) {
106 return __builtin_clzl(t);
107}
108
109static __inline__ uint64_t __attribute__((always_inline, nodebug))
110 __clzll(uint64_t t) {
111#if __SIZEOF_LONG_LONG__ == 8
112 return __builtin_clzll(t);
113#else
114 return __builtin_clzl(t);
115#endif
116}
117
118static __inline__ uint32_t __attribute__((always_inline, nodebug))
119 __rev(uint32_t t) {
120 return __builtin_bswap32(t);
121}
122
123static __inline__ unsigned long __attribute__((always_inline, nodebug))
124 __revl(unsigned long t) {
125#if __SIZEOF_LONG__ == 4
126 return __builtin_bswap32(t);
127#else
128 return __builtin_bswap64(t);
129#endif
130}
131
132static __inline__ uint64_t __attribute__((always_inline, nodebug))
133 __revll(uint64_t t) {
134 return __builtin_bswap64(t);
135}
136
Yi Konga44c4d72014-06-27 21:25:42 +0000137/*
Yi Kong4e00ce72014-07-12 22:48:13 +0000138 * 9.4 Saturating intrinsics
Yi Konga44c4d72014-06-27 21:25:42 +0000139 *
140 * FIXME: Change guard to their corrosponding __ARM_FEATURE flag when Q flag
141 * intrinsics are implemented and the flag is enabled.
142 */
Yi Kong4e00ce72014-07-12 22:48:13 +0000143/* 9.4.1 Width-specified saturation intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000144#if __ARM_32BIT_STATE
145#define __ssat(x, y) __builtin_arm_ssat(x, y)
146#define __usat(x, y) __builtin_arm_usat(x, y)
Yi Kong4e00ce72014-07-12 22:48:13 +0000147#endif
Yi Konga44c4d72014-06-27 21:25:42 +0000148
Yi Kong4e00ce72014-07-12 22:48:13 +0000149/* 9.4.2 Saturating addition and subtraction intrinsics */
150#if __ARM_32BIT_STATE
Yi Konga44c4d72014-06-27 21:25:42 +0000151static __inline__ int32_t __attribute__((always_inline, nodebug))
152 __qadd(int32_t t, int32_t v) {
153 return __builtin_arm_qadd(t, v);
154}
155
156static __inline__ int32_t __attribute__((always_inline, nodebug))
157 __qsub(int32_t t, int32_t v) {
158 return __builtin_arm_qsub(t, v);
159}
Renato Golin47843ef2014-07-03 10:14:52 +0000160
161static __inline__ int32_t __attribute__((always_inline, nodebug))
162__qdbl(int32_t t) {
163 return __builtin_arm_qadd(t, t);
164}
Yi Konga44c4d72014-06-27 21:25:42 +0000165#endif
166
Yi Kong4e00ce72014-07-12 22:48:13 +0000167/* 9.7 CRC32 intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000168#if __ARM_FEATURE_CRC32
169static __inline__ uint32_t __attribute__((always_inline, nodebug))
170 __crc32b(uint32_t a, uint8_t b) {
171 return __builtin_arm_crc32b(a, b);
172}
173
174static __inline__ uint32_t __attribute__((always_inline, nodebug))
175 __crc32h(uint32_t a, uint16_t b) {
176 return __builtin_arm_crc32h(a, b);
177}
178
179static __inline__ uint32_t __attribute__((always_inline, nodebug))
180 __crc32w(uint32_t a, uint32_t b) {
181 return __builtin_arm_crc32w(a, b);
182}
183
184static __inline__ uint32_t __attribute__((always_inline, nodebug))
185 __crc32d(uint32_t a, uint64_t b) {
186 return __builtin_arm_crc32d(a, b);
187}
188
189static __inline__ uint32_t __attribute__((always_inline, nodebug))
190 __crc32cb(uint32_t a, uint8_t b) {
191 return __builtin_arm_crc32cb(a, b);
192}
193
194static __inline__ uint32_t __attribute__((always_inline, nodebug))
195 __crc32ch(uint32_t a, uint16_t b) {
196 return __builtin_arm_crc32ch(a, b);
197}
198
199static __inline__ uint32_t __attribute__((always_inline, nodebug))
200 __crc32cw(uint32_t a, uint32_t b) {
201 return __builtin_arm_crc32cw(a, b);
202}
203
204static __inline__ uint32_t __attribute__((always_inline, nodebug))
205 __crc32cd(uint32_t a, uint64_t b) {
206 return __builtin_arm_crc32cd(a, b);
207}
208#endif
209
Saleem Abdulrasool60df0612014-07-08 05:46:00 +0000210#if defined(__cplusplus)
211}
212#endif
213
Yi Konga44c4d72014-06-27 21:25:42 +0000214#endif /* __ARM_ACLE_H */