Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 1 | ; Test 64-bit comparisons in which the second operand is a PC-relative |
| 2 | ; variable. |
| 3 | ; |
| 4 | ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s |
| 5 | |
| 6 | @g = global i64 1 |
Richard Sandiford | 46af5a2 | 2013-05-30 09:45:42 +0000 | [diff] [blame^] | 7 | @h = global i64 1, align 4, section "foo" |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 8 | |
| 9 | ; Check signed comparisons. |
| 10 | define i64 @f1(i64 %src1) { |
| 11 | ; CHECK: f1: |
| 12 | ; CHECK: cgrl %r2, g |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 13 | ; CHECK-NEXT: jl |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 14 | ; CHECK: br %r14 |
| 15 | entry: |
| 16 | %src2 = load i64 *@g |
| 17 | %cond = icmp slt i64 %src1, %src2 |
| 18 | br i1 %cond, label %exit, label %mulb |
| 19 | mulb: |
| 20 | %mul = mul i64 %src1, %src1 |
| 21 | br label %exit |
| 22 | exit: |
| 23 | %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] |
| 24 | ret i64 %res |
| 25 | } |
| 26 | |
| 27 | ; Check unsigned comparisons. |
| 28 | define i64 @f2(i64 %src1) { |
| 29 | ; CHECK: f2: |
| 30 | ; CHECK: clgrl %r2, g |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 31 | ; CHECK-NEXT: jl |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 32 | ; CHECK: br %r14 |
| 33 | entry: |
| 34 | %src2 = load i64 *@g |
| 35 | %cond = icmp ult i64 %src1, %src2 |
| 36 | br i1 %cond, label %exit, label %mulb |
| 37 | mulb: |
| 38 | %mul = mul i64 %src1, %src1 |
| 39 | br label %exit |
| 40 | exit: |
| 41 | %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] |
| 42 | ret i64 %res |
| 43 | } |
| 44 | |
| 45 | ; Check equality, which can use CRL or CLRL. |
| 46 | define i64 @f3(i64 %src1) { |
| 47 | ; CHECK: f3: |
| 48 | ; CHECK: c{{l?}}grl %r2, g |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 49 | ; CHECK-NEXT: je |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 50 | ; CHECK: br %r14 |
| 51 | entry: |
| 52 | %src2 = load i64 *@g |
| 53 | %cond = icmp eq i64 %src1, %src2 |
| 54 | br i1 %cond, label %exit, label %mulb |
| 55 | mulb: |
| 56 | %mul = mul i64 %src1, %src1 |
| 57 | br label %exit |
| 58 | exit: |
| 59 | %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] |
| 60 | ret i64 %res |
| 61 | } |
| 62 | |
| 63 | ; ...likewise inequality. |
| 64 | define i64 @f4(i64 %src1) { |
| 65 | ; CHECK: f4: |
| 66 | ; CHECK: c{{l?}}grl %r2, g |
Richard Sandiford | 586f417 | 2013-05-21 08:53:17 +0000 | [diff] [blame] | 67 | ; CHECK-NEXT: jlh |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 68 | ; CHECK: br %r14 |
| 69 | entry: |
| 70 | %src2 = load i64 *@g |
| 71 | %cond = icmp ne i64 %src1, %src2 |
| 72 | br i1 %cond, label %exit, label %mulb |
| 73 | mulb: |
| 74 | %mul = mul i64 %src1, %src1 |
| 75 | br label %exit |
| 76 | exit: |
| 77 | %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] |
| 78 | ret i64 %res |
| 79 | } |
Richard Sandiford | 46af5a2 | 2013-05-30 09:45:42 +0000 | [diff] [blame^] | 80 | |
| 81 | ; Repeat f1 with an unaligned address. |
| 82 | define i64 @f5(i64 %src1) { |
| 83 | ; CHECK: f5: |
| 84 | ; CHECK: larl [[REG:%r[0-5]]], h |
| 85 | ; CHECK: cg %r2, 0([[REG]]) |
| 86 | ; CHECK-NEXT: jl |
| 87 | ; CHECK: br %r14 |
| 88 | entry: |
| 89 | %src2 = load i64 *@h, align 4 |
| 90 | %cond = icmp slt i64 %src1, %src2 |
| 91 | br i1 %cond, label %exit, label %mulb |
| 92 | mulb: |
| 93 | %mul = mul i64 %src1, %src1 |
| 94 | br label %exit |
| 95 | exit: |
| 96 | %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] |
| 97 | ret i64 %res |
| 98 | } |