Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 49f8bfdcb71ce973ca847243c84cfea607cfa847 / . / llvm / test / CodeGen / R600 / llvm.AMDGPU.rcp.ll
blob: 4979a14ccdfccc60b7d6b5d64310db3abe2686b8 [file] [log] [blame]
Tom Stellard49f8bfd2015-01-06 18:00:21 +0000[diff] [blame^]1; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=SI-UNSAFE -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s
3; XUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE-SPDENORM -check-prefix=SI -check-prefix=FUNC %s
Matt Arsenaulta0050b02014-06-19 01:19:19 +0000[diff] [blame]4
Matt Arsenault9acb9782014-07-24 06:59:24 +0000[diff] [blame]5; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG-SAFE -check-prefix=FUNC %s
6; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
7
Matt Arsenaulta0050b02014-06-19 01:19:19 +0000[diff] [blame]8declare float @llvm.AMDGPU.rcp.f32(float) nounwind readnone
9declare double @llvm.AMDGPU.rcp.f64(double) nounwind readnone
10
Matt Arsenaulta0050b02014-06-19 01:19:19 +0000[diff] [blame]11declare float @llvm.sqrt.f32(float) nounwind readnone
Matt Arsenaulta0050b02014-06-19 01:19:19 +0000[diff] [blame]12
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]13; FUNC-LABEL: {{^}}rcp_f32:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]14; SI: v_rcp_f32_e32
Matt Arsenault9acb9782014-07-24 06:59:24 +0000[diff] [blame]15; EG: RECIP_IEEE
Matt Arsenaulta0050b02014-06-19 01:19:19 +0000[diff] [blame]16define void @rcp_f32(float addrspace(1)* %out, float %src) nounwind {
17 %rcp = call float @llvm.AMDGPU.rcp.f32(float %src) nounwind readnone
18 store float %rcp, float addrspace(1)* %out, align 4
19 ret void
20}
21
Matt Arsenault9acb9782014-07-24 06:59:24 +0000[diff] [blame]22; FIXME: Evergreen only ever does unsafe fp math.
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]23; FUNC-LABEL: {{^}}rcp_pat_f32:
Matt Arsenault9acb9782014-07-24 06:59:24 +0000[diff] [blame]24
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]25; SI-SAFE: v_rcp_f32_e32
26; XSI-SAFE-SPDENORM-NOT: v_rcp_f32_e32
Matt Arsenault9acb9782014-07-24 06:59:24 +0000[diff] [blame]27
28; EG: RECIP_IEEE
29
Matt Arsenaulta0050b02014-06-19 01:19:19 +0000[diff] [blame]30define void @rcp_pat_f32(float addrspace(1)* %out, float %src) nounwind {
31 %rcp = fdiv float 1.0, %src
32 store float %rcp, float addrspace(1)* %out, align 4
33 ret void
34}
35
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]36; FUNC-LABEL: {{^}}rsq_rcp_pat_f32:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]37; SI-UNSAFE: v_rsq_f32_e32
38; SI-SAFE: v_sqrt_f32_e32
39; SI-SAFE: v_rcp_f32_e32
Matt Arsenault9acb9782014-07-24 06:59:24 +0000[diff] [blame]40
41; EG: RECIPSQRT_IEEE
Matt Arsenaulta0050b02014-06-19 01:19:19 +0000[diff] [blame]42define void @rsq_rcp_pat_f32(float addrspace(1)* %out, float %src) nounwind {
43 %sqrt = call float @llvm.sqrt.f32(float %src) nounwind readnone
44 %rcp = call float @llvm.AMDGPU.rcp.f32(float %sqrt) nounwind readnone
45 store float %rcp, float addrspace(1)* %out, align 4
46 ret void
47}