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gerrit-public.fairphone.software / toolchain / llvm-project / 49f8bfdcb71ce973ca847243c84cfea607cfa847 / . / llvm / test / CodeGen / R600 / reorder-stores.ll
blob: 81e424aab21e6ca7e33d5b9df30ac512f32b4bf0 [file] [log] [blame]
Tom Stellard49f8bfd2015-01-06 18:00:21 +0000[diff] [blame^]1; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]2
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]3; SI-LABEL: {{^}}no_reorder_v2f64_global_load_store:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]4; SI: buffer_load_dwordx2
5; SI: buffer_load_dwordx2
6; SI: buffer_load_dwordx2
7; SI: buffer_load_dwordx2
8; SI: buffer_store_dwordx2
9; SI: buffer_store_dwordx2
10; SI: buffer_store_dwordx2
11; SI: buffer_store_dwordx2
12; SI: s_endpgm
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]13define void @no_reorder_v2f64_global_load_store(<2 x double> addrspace(1)* nocapture %x, <2 x double> addrspace(1)* nocapture %y) nounwind {
14 %tmp1 = load <2 x double> addrspace(1)* %x, align 16
15 %tmp4 = load <2 x double> addrspace(1)* %y, align 16
16 store <2 x double> %tmp4, <2 x double> addrspace(1)* %x, align 16
17 store <2 x double> %tmp1, <2 x double> addrspace(1)* %y, align 16
18 ret void
19}
20
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]21; SI-LABEL: {{^}}no_reorder_scalarized_v2f64_local_load_store:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]22; SI: ds_read_b64
23; SI: ds_read_b64
24; SI: ds_write_b64
25; SI: ds_write_b64
26; SI: s_endpgm
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]27define void @no_reorder_scalarized_v2f64_local_load_store(<2 x double> addrspace(3)* nocapture %x, <2 x double> addrspace(3)* nocapture %y) nounwind {
28 %tmp1 = load <2 x double> addrspace(3)* %x, align 16
29 %tmp4 = load <2 x double> addrspace(3)* %y, align 16
30 store <2 x double> %tmp4, <2 x double> addrspace(3)* %x, align 16
31 store <2 x double> %tmp1, <2 x double> addrspace(3)* %y, align 16
32 ret void
33}
34
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]35; SI-LABEL: {{^}}no_reorder_split_v8i32_global_load_store:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]36; SI: buffer_load_dword
37; SI: buffer_load_dword
38; SI: buffer_load_dword
39; SI: buffer_load_dword
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]40
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]41; SI: buffer_load_dword
42; SI: buffer_load_dword
43; SI: buffer_load_dword
44; SI: buffer_load_dword
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]45
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]46; SI: buffer_load_dword
47; SI: buffer_load_dword
48; SI: buffer_load_dword
49; SI: buffer_load_dword
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]50
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]51; SI: buffer_load_dword
52; SI: buffer_load_dword
53; SI: buffer_load_dword
54; SI: buffer_load_dword
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]55
56
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]57; SI: buffer_store_dword
58; SI: buffer_store_dword
59; SI: buffer_store_dword
60; SI: buffer_store_dword
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]61
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]62; SI: buffer_store_dword
63; SI: buffer_store_dword
64; SI: buffer_store_dword
65; SI: buffer_store_dword
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]66
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]67; SI: buffer_store_dword
68; SI: buffer_store_dword
69; SI: buffer_store_dword
70; SI: buffer_store_dword
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]71
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]72; SI: buffer_store_dword
73; SI: buffer_store_dword
74; SI: buffer_store_dword
75; SI: buffer_store_dword
76; SI: s_endpgm
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]77define void @no_reorder_split_v8i32_global_load_store(<8 x i32> addrspace(1)* nocapture %x, <8 x i32> addrspace(1)* nocapture %y) nounwind {
78 %tmp1 = load <8 x i32> addrspace(1)* %x, align 32
79 %tmp4 = load <8 x i32> addrspace(1)* %y, align 32
80 store <8 x i32> %tmp4, <8 x i32> addrspace(1)* %x, align 32
81 store <8 x i32> %tmp1, <8 x i32> addrspace(1)* %y, align 32
82 ret void
83}
84
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]85; SI-LABEL: {{^}}no_reorder_extload_64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]86; SI: ds_read_b64
87; SI: ds_read_b64
88; SI: ds_write_b64
89; SI-NOT: ds_read
90; SI: ds_write_b64
91; SI: s_endpgm
Matt Arsenaultd2c9e082014-07-07 18:34:45 +0000[diff] [blame]92define void @no_reorder_extload_64(<2 x i32> addrspace(3)* nocapture %x, <2 x i32> addrspace(3)* nocapture %y) nounwind {
93 %tmp1 = load <2 x i32> addrspace(3)* %x, align 8
94 %tmp4 = load <2 x i32> addrspace(3)* %y, align 8
95 %tmp1ext = zext <2 x i32> %tmp1 to <2 x i64>
96 %tmp4ext = zext <2 x i32> %tmp4 to <2 x i64>
97 %tmp7 = add <2 x i64> %tmp1ext, <i64 1, i64 1>
98 %tmp9 = add <2 x i64> %tmp4ext, <i64 1, i64 1>
99 %trunctmp9 = trunc <2 x i64> %tmp9 to <2 x i32>
100 %trunctmp7 = trunc <2 x i64> %tmp7 to <2 x i32>
101 store <2 x i32> %trunctmp9, <2 x i32> addrspace(3)* %x, align 8
102 store <2 x i32> %trunctmp7, <2 x i32> addrspace(3)* %y, align 8
103 ret void
104}