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Tom Stellard75aadc22012-12-11 21:25:42 +00001//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef AMDGPU_TARGET_MACHINE_H
16#define AMDGPU_TARGET_MACHINE_H
17
Tom Stellardf3b2a1e2013-02-06 17:32:29 +000018#include "AMDGPUFrameLowering.h"
Tom Stellard75aadc22012-12-11 21:25:42 +000019#include "AMDGPUInstrInfo.h"
20#include "AMDGPUSubtarget.h"
Tom Stellard75aadc22012-12-11 21:25:42 +000021#include "AMDILIntrinsicInfo.h"
22#include "R600ISelLowering.h"
Chandler Carruth9fb823b2013-01-02 11:36:10 +000023#include "llvm/IR/DataLayout.h"
Tom Stellard75aadc22012-12-11 21:25:42 +000024
25namespace llvm {
26
Tom Stellard75aadc22012-12-11 21:25:42 +000027class AMDGPUTargetMachine : public LLVMTargetMachine {
28
29 AMDGPUSubtarget Subtarget;
30 const DataLayout Layout;
31 AMDGPUFrameLowering FrameLowering;
32 AMDGPUIntrinsicInfo IntrinsicInfo;
Benjamin Kramerd2da7202014-04-21 09:34:48 +000033 std::unique_ptr<AMDGPUInstrInfo> InstrInfo;
34 std::unique_ptr<AMDGPUTargetLowering> TLInfo;
Rafael Espindolabd6847f2013-05-23 03:28:39 +000035 const InstrItineraryData *InstrItins;
Tom Stellard75aadc22012-12-11 21:25:42 +000036
37public:
Rafael Espindolabd6847f2013-05-23 03:28:39 +000038 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
39 StringRef CPU, TargetOptions Options, Reloc::Model RM,
40 CodeModel::Model CM, CodeGenOpt::Level OL);
41 ~AMDGPUTargetMachine();
Craig Topper5656db42014-04-29 07:57:24 +000042 const AMDGPUFrameLowering *getFrameLowering() const override {
Rafael Espindolabd6847f2013-05-23 03:28:39 +000043 return &FrameLowering;
44 }
Craig Topper5656db42014-04-29 07:57:24 +000045 const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
Rafael Espindolabd6847f2013-05-23 03:28:39 +000046 return &IntrinsicInfo;
47 }
Craig Topper5656db42014-04-29 07:57:24 +000048 const AMDGPUInstrInfo *getInstrInfo() const override {
Rafael Espindola39aca622013-05-23 03:31:47 +000049 return InstrInfo.get();
50 }
Craig Topper5656db42014-04-29 07:57:24 +000051 const AMDGPUSubtarget *getSubtargetImpl() const override {
52 return &Subtarget;
53 }
54 const AMDGPURegisterInfo *getRegisterInfo() const override {
Rafael Espindolabd6847f2013-05-23 03:28:39 +000055 return &InstrInfo->getRegisterInfo();
56 }
Craig Topper5656db42014-04-29 07:57:24 +000057 AMDGPUTargetLowering *getTargetLowering() const override {
Rafael Espindola39aca622013-05-23 03:31:47 +000058 return TLInfo.get();
59 }
Craig Topper5656db42014-04-29 07:57:24 +000060 const InstrItineraryData *getInstrItineraryData() const override {
Rafael Espindolabd6847f2013-05-23 03:28:39 +000061 return InstrItins;
62 }
Craig Topper5656db42014-04-29 07:57:24 +000063 const DataLayout *getDataLayout() const override { return &Layout; }
64 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
Tom Stellard8b1e0212013-07-27 00:01:07 +000065
66 /// \brief Register R600 analysis passes with a pass manager.
Craig Topper5656db42014-04-29 07:57:24 +000067 void addAnalysisPasses(PassManagerBase &PM) override;
Tom Stellard75aadc22012-12-11 21:25:42 +000068};
69
70} // End namespace llvm
71
72#endif // AMDGPU_TARGET_MACHINE_H