Nirav Dave | 5b414eb | 2017-03-28 15:41:12 +0000 | [diff] [blame^] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | ; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s -check-prefix=X64 |
| 3 | |
| 4 | @var_825 = external global i16, align 2 |
| 5 | @var_32 = external global i16, align 2 |
| 6 | @var_901 = external global i16, align 2 |
| 7 | @var_826 = external global i64, align 8 |
| 8 | @var_57 = external global i64, align 8 |
| 9 | @var_900 = external global i16, align 2 |
| 10 | @var_28 = external constant i64, align 8 |
| 11 | @var_827 = external global i16, align 2 |
| 12 | |
| 13 | define void @foo() { |
| 14 | ; X64-LABEL: foo: |
| 15 | ; X64: # BB#0: # %entry |
| 16 | ; X64-NEXT: movw $0, {{.*}}(%rip) |
| 17 | ; X64-NEXT: movzwl {{.*}}(%rip), %eax |
| 18 | ; X64-NEXT: movw %ax, %cx |
| 19 | ; X64-NEXT: movw {{.*}}(%rip), %dx |
| 20 | ; X64-NEXT: xorw %dx, %cx |
| 21 | ; X64-NEXT: # implicit-def: %ESI |
| 22 | ; X64-NEXT: movw %cx, %si |
| 23 | ; X64-NEXT: movl %eax, %edi |
| 24 | ; X64-NEXT: xorl %esi, %edi |
| 25 | ; X64-NEXT: movw %di, %cx |
| 26 | ; X64-NEXT: movzwl %cx, %esi |
| 27 | ; X64-NEXT: movl %esi, %edi |
| 28 | ; X64-NEXT: addl %eax, %edi |
| 29 | ; X64-NEXT: movl %edi, %r8d |
| 30 | ; X64-NEXT: movq %r8, {{.*}}(%rip) |
| 31 | ; X64-NEXT: xorl $-772157262, %esi # imm = 0xD1F9D0B2 |
| 32 | ; X64-NEXT: movl {{.*}}(%rip), %eax |
| 33 | ; X64-NEXT: movl %esi, %edi |
| 34 | ; X64-NEXT: orl %eax, %edi |
| 35 | ; X64-NEXT: orl %edi, %esi |
| 36 | ; X64-NEXT: movw %si, %cx |
| 37 | ; X64-NEXT: movw %cx, {{.*}}(%rip) |
| 38 | ; X64-NEXT: movq {{.*}}(%rip), %r8 |
| 39 | ; X64-NEXT: testq %r8, %r8 |
| 40 | ; X64-NEXT: setne %r9b |
| 41 | ; X64-NEXT: movzbl %r9b, %eax |
| 42 | ; X64-NEXT: movw %ax, %cx |
| 43 | ; X64-NEXT: movw %cx, var_827 |
| 44 | ; X64-NEXT: retq |
| 45 | entry: |
| 46 | store i16 0, i16* @var_825, align 2 |
| 47 | %v0 = load i16, i16* @var_32, align 2 |
| 48 | %conv = zext i16 %v0 to i32 |
| 49 | %v2 = load i16, i16* @var_901, align 2 |
| 50 | %conv2 = zext i16 %v2 to i32 |
| 51 | %xor = xor i32 %conv, %conv2 |
| 52 | %xor3 = xor i32 %conv, %xor |
| 53 | %add = add nsw i32 %xor3, %conv |
| 54 | %conv5 = sext i32 %add to i64 |
| 55 | store i64 %conv5, i64* @var_826, align 8 |
| 56 | %v4 = load i16, i16* @var_32, align 2 |
| 57 | %conv6 = zext i16 %v4 to i64 |
| 58 | %v6 = load i16, i16* @var_901, align 2 |
| 59 | %conv8 = zext i16 %v6 to i32 |
| 60 | %xor9 = xor i32 51981, %conv8 |
| 61 | %conv10 = sext i32 %xor9 to i64 |
| 62 | %xor11 = xor i64 -1142377792914660288, %conv10 |
| 63 | %xor12 = xor i64 %conv6, %xor11 |
| 64 | %neg = xor i64 %xor12, -1 |
| 65 | %xor13 = xor i64 %conv6, %neg |
| 66 | %v9 = load i16, i16* @var_901, align 2 |
| 67 | %v10 = load i64, i64* @var_57, align 8 |
| 68 | %or = or i64 %xor13, %v10 |
| 69 | %or23 = or i64 %xor13, %or |
| 70 | %conv24 = trunc i64 %or23 to i16 |
| 71 | store i16 %conv24, i16* @var_900, align 2 |
| 72 | %v11 = load i64, i64* @var_28, align 8 |
| 73 | %cmp = icmp ne i64 0, %v11 |
| 74 | %conv25 = zext i1 %cmp to i16 |
| 75 | store i16 %conv25, i16* @var_827, align 2 |
| 76 | ret void |
| 77 | } |