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gerrit-public.fairphone.software / toolchain / llvm-project / 5ea17d450e6851b5a950115be96d82b4137e4b59 / . / llvm / test / CodeGen / WebAssembly / simd-comparisons.ll
blob: 5f0a1e93b45bf04de735eb3a61be8a8bfb5572a6 [file] [log] [blame]
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
3; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]4
5; Test SIMD comparison operators
6
7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
8target triple = "wasm32-unknown-unknown"
9
10; CHECK-LABEL: compare_eq_v16i8:
11; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]12; SIMD128-NEXT: .param v128, v128{{$}}
13; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]14; SIMD128-NEXT: i8x16.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
15; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]16define <16 x i1> @compare_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) {
17 %res = icmp eq <16 x i8> %x, %y
18 ret <16 x i1> %res
19}
20
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]21; CHECK-LABEL: compare_sext_eq_v16i8:
22; NO-SIMD128-NOT: i8x16
23; SIMD128-NEXT: .param v128, v128{{$}}
24; SIMD128-NEXT: .result v128{{$}}
25; SIMD128-NEXT: i8x16.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
26; SIMD128-NEXT: return $pop[[R]]{{$}}
27define <16 x i8> @compare_sext_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) {
28 %cmp = icmp eq <16 x i8> %x, %y
29 %res = sext <16 x i1> %cmp to <16 x i8>
30 ret <16 x i8> %res
31}
32
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]33; CHECK-LABEL: compare_ne_v16i8:
34; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]35; SIMD128-NEXT: .param v128, v128{{$}}
36; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]37; SIMD128-NEXT: i8x16.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
38; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]39define <16 x i1> @compare_ne_v16i8 (<16 x i8> %x, <16 x i8> %y) {
40 %res = icmp ne <16 x i8> %x, %y
41 ret <16 x i1> %res
42}
43
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]44; CHECK-LABEL: compare_sext_ne_v16i8:
45; NO-SIMD128-NOT: i8x16
46; SIMD128-NEXT: .param v128, v128{{$}}
47; SIMD128-NEXT: .result v128{{$}}
48; SIMD128-NEXT: i8x16.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
49; SIMD128-NEXT: return $pop[[R]]{{$}}
50define <16 x i8> @compare_sext_ne_v16i8 (<16 x i8> %x, <16 x i8> %y) {
51 %cmp = icmp ne <16 x i8> %x, %y
52 %res = sext <16 x i1> %cmp to <16 x i8>
53 ret <16 x i8> %res
54}
55
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]56; CHECK-LABEL: compare_slt_v16i8:
57; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]58; SIMD128-NEXT: .param v128, v128{{$}}
59; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]60; SIMD128-NEXT: i8x16.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
61; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]62define <16 x i1> @compare_slt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
63 %res = icmp slt <16 x i8> %x, %y
64 ret <16 x i1> %res
65}
66
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]67; CHECK-LABEL: compare_sext_slt_v16i8:
68; NO-SIMD128-NOT: i8x16
69; SIMD128-NEXT: .param v128, v128{{$}}
70; SIMD128-NEXT: .result v128{{$}}
71; SIMD128-NEXT: i8x16.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
72; SIMD128-NEXT: return $pop[[R]]{{$}}
73define <16 x i8> @compare_sext_slt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
74 %cmp = icmp slt <16 x i8> %x, %y
75 %res = sext <16 x i1> %cmp to <16 x i8>
76 ret <16 x i8> %res
77}
78
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]79; CHECK-LABEL: compare_ult_v16i8:
80; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]81; SIMD128-NEXT: .param v128, v128{{$}}
82; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]83; SIMD128-NEXT: i8x16.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
84; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]85define <16 x i1> @compare_ult_v16i8 (<16 x i8> %x, <16 x i8> %y) {
86 %res = icmp ult <16 x i8> %x, %y
87 ret <16 x i1> %res
88}
89
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]90; CHECK-LABEL: compare_sext_ult_v16i8:
91; NO-SIMD128-NOT: i8x16
92; SIMD128-NEXT: .param v128, v128{{$}}
93; SIMD128-NEXT: .result v128{{$}}
94; SIMD128-NEXT: i8x16.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
95; SIMD128-NEXT: return $pop[[R]]{{$}}
96define <16 x i8> @compare_sext_ult_v16i8 (<16 x i8> %x, <16 x i8> %y) {
97 %cmp = icmp ult <16 x i8> %x, %y
98 %res = sext <16 x i1> %cmp to <16 x i8>
99 ret <16 x i8> %res
100}
101
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]102; CHECK-LABEL: compare_sle_v16i8:
103; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]104; SIMD128-NEXT: .param v128, v128{{$}}
105; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]106; SIMD128-NEXT: i8x16.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
107; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]108define <16 x i1> @compare_sle_v16i8 (<16 x i8> %x, <16 x i8> %y) {
109 %res = icmp sle <16 x i8> %x, %y
110 ret <16 x i1> %res
111}
112
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]113; CHECK-LABEL: compare_sext_sle_v16i8:
114; NO-SIMD128-NOT: i8x16
115; SIMD128-NEXT: .param v128, v128{{$}}
116; SIMD128-NEXT: .result v128{{$}}
117; SIMD128-NEXT: i8x16.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
118; SIMD128-NEXT: return $pop[[R]]{{$}}
119define <16 x i8> @compare_sext_sle_v16i8 (<16 x i8> %x, <16 x i8> %y) {
120 %cmp = icmp sle <16 x i8> %x, %y
121 %res = sext <16 x i1> %cmp to <16 x i8>
122 ret <16 x i8> %res
123}
124
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]125; CHECK-LABEL: compare_ule_v16i8:
126; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]127; SIMD128-NEXT: .param v128, v128{{$}}
128; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]129; SIMD128-NEXT: i8x16.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
130; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]131define <16 x i1> @compare_ule_v16i8 (<16 x i8> %x, <16 x i8> %y) {
132 %res = icmp ule <16 x i8> %x, %y
133 ret <16 x i1> %res
134}
135
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]136; CHECK-LABEL: compare_sext_ule_v16i8:
137; NO-SIMD128-NOT: i8x16
138; SIMD128-NEXT: .param v128, v128{{$}}
139; SIMD128-NEXT: .result v128{{$}}
140; SIMD128-NEXT: i8x16.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
141; SIMD128-NEXT: return $pop[[R]]{{$}}
142define <16 x i8> @compare_sext_ule_v16i8 (<16 x i8> %x, <16 x i8> %y) {
143 %cmp = icmp ule <16 x i8> %x, %y
144 %res = sext <16 x i1> %cmp to <16 x i8>
145 ret <16 x i8> %res
146}
147
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]148; CHECK-LABEL: compare_sgt_v16i8:
149; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]150; SIMD128-NEXT: .param v128, v128{{$}}
151; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]152; SIMD128-NEXT: i8x16.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
153; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]154define <16 x i1> @compare_sgt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
155 %res = icmp sgt <16 x i8> %x, %y
156 ret <16 x i1> %res
157}
158
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]159; CHECK-LABEL: compare_sext_sgt_v16i8:
160; NO-SIMD128-NOT: i8x16
161; SIMD128-NEXT: .param v128, v128{{$}}
162; SIMD128-NEXT: .result v128{{$}}
163; SIMD128-NEXT: i8x16.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
164; SIMD128-NEXT: return $pop[[R]]{{$}}
165define <16 x i8> @compare_sext_sgt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
166 %cmp = icmp sgt <16 x i8> %x, %y
167 %res = sext <16 x i1> %cmp to <16 x i8>
168 ret <16 x i8> %res
169}
170
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]171; CHECK-LABEL: compare_ugt_v16i8:
172; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]173; SIMD128-NEXT: .param v128, v128{{$}}
174; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]175; SIMD128-NEXT: i8x16.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
176; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]177define <16 x i1> @compare_ugt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
178 %res = icmp ugt <16 x i8> %x, %y
179 ret <16 x i1> %res
180}
181
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]182; CHECK-LABEL: compare_sext_ugt_v16i8:
183; NO-SIMD128-NOT: i8x16
184; SIMD128-NEXT: .param v128, v128{{$}}
185; SIMD128-NEXT: .result v128{{$}}
186; SIMD128-NEXT: i8x16.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
187; SIMD128-NEXT: return $pop[[R]]{{$}}
188define <16 x i8> @compare_sext_ugt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
189 %cmp = icmp ugt <16 x i8> %x, %y
190 %res = sext <16 x i1> %cmp to <16 x i8>
191 ret <16 x i8> %res
192}
193
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]194; CHECK-LABEL: compare_sge_v16i8:
195; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]196; SIMD128-NEXT: .param v128, v128{{$}}
197; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]198; SIMD128-NEXT: i8x16.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
199; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]200define <16 x i1> @compare_sge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
201 %res = icmp sge <16 x i8> %x, %y
202 ret <16 x i1> %res
203}
204
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]205; CHECK-LABEL: compare_sext_sge_v16i8:
206; NO-SIMD128-NOT: i8x16
207; SIMD128-NEXT: .param v128, v128{{$}}
208; SIMD128-NEXT: .result v128{{$}}
209; SIMD128-NEXT: i8x16.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
210; SIMD128-NEXT: return $pop[[R]]{{$}}
211define <16 x i8> @compare_sext_sge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
212 %cmp = icmp sge <16 x i8> %x, %y
213 %res = sext <16 x i1> %cmp to <16 x i8>
214 ret <16 x i8> %res
215}
216
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]217; CHECK-LABEL: compare_uge_v16i8:
218; NO-SIMD128-NOT: i8x16
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]219; SIMD128-NEXT: .param v128, v128{{$}}
220; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]221; SIMD128-NEXT: i8x16.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
222; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]223define <16 x i1> @compare_uge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
224 %res = icmp uge <16 x i8> %x, %y
225 ret <16 x i1> %res
226}
227
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]228; CHECK-LABEL: compare_sext_uge_v16i8:
229; NO-SIMD128-NOT: i8x16
230; SIMD128-NEXT: .param v128, v128{{$}}
231; SIMD128-NEXT: .result v128{{$}}
232; SIMD128-NEXT: i8x16.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
233; SIMD128-NEXT: return $pop[[R]]{{$}}
234define <16 x i8> @compare_sext_uge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
235 %cmp = icmp uge <16 x i8> %x, %y
236 %res = sext <16 x i1> %cmp to <16 x i8>
237 ret <16 x i8> %res
238}
239
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]240; CHECK-LABEL: compare_eq_v8i16:
241; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]242; SIMD128-NEXT: .param v128, v128{{$}}
243; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]244; SIMD128-NEXT: i16x8.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
245; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]246define <8 x i1> @compare_eq_v8i16 (<8 x i16> %x, <8 x i16> %y) {
247 %res = icmp eq <8 x i16> %x, %y
248 ret <8 x i1> %res
249}
250
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]251; CHECK-LABEL: compare_sext_eq_v8i16:
252; NO-SIMD128-NOT: i16x8
253; SIMD128-NEXT: .param v128, v128{{$}}
254; SIMD128-NEXT: .result v128{{$}}
255; SIMD128-NEXT: i16x8.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
256; SIMD128-NEXT: return $pop[[R]]{{$}}
257define <8 x i16> @compare_sext_eq_v8i16 (<8 x i16> %x, <8 x i16> %y) {
258 %cmp = icmp eq <8 x i16> %x, %y
259 %res = sext <8 x i1> %cmp to <8 x i16>
260 ret <8 x i16> %res
261}
262
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]263; CHECK-LABEL: compare_ne_v8i16:
264; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]265; SIMD128-NEXT: .param v128, v128{{$}}
266; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]267; SIMD128-NEXT: i16x8.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
268; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]269define <8 x i1> @compare_ne_v8i16 (<8 x i16> %x, <8 x i16> %y) {
270 %res = icmp ne <8 x i16> %x, %y
271 ret <8 x i1> %res
272}
273
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]274; CHECK-LABEL: compare_sext_ne_v8i16:
275; NO-SIMD128-NOT: i16x8
276; SIMD128-NEXT: .param v128, v128{{$}}
277; SIMD128-NEXT: .result v128{{$}}
278; SIMD128-NEXT: i16x8.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
279; SIMD128-NEXT: return $pop[[R]]{{$}}
280define <8 x i16> @compare_sext_ne_v8i16 (<8 x i16> %x, <8 x i16> %y) {
281 %cmp = icmp ne <8 x i16> %x, %y
282 %res = sext <8 x i1> %cmp to <8 x i16>
283 ret <8 x i16> %res
284}
285
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]286; CHECK-LABEL: compare_slt_v8i16:
287; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]288; SIMD128-NEXT: .param v128, v128{{$}}
289; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]290; SIMD128-NEXT: i16x8.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
291; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]292define <8 x i1> @compare_slt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
293 %res = icmp slt <8 x i16> %x, %y
294 ret <8 x i1> %res
295}
296
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]297; CHECK-LABEL: compare_sext_slt_v8i16:
298; NO-SIMD128-NOT: i16x8
299; SIMD128-NEXT: .param v128, v128{{$}}
300; SIMD128-NEXT: .result v128{{$}}
301; SIMD128-NEXT: i16x8.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
302; SIMD128-NEXT: return $pop[[R]]{{$}}
303define <8 x i16> @compare_sext_slt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
304 %cmp = icmp slt <8 x i16> %x, %y
305 %res = sext <8 x i1> %cmp to <8 x i16>
306 ret <8 x i16> %res
307}
308
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]309; CHECK-LABEL: compare_ult_v8i16:
310; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]311; SIMD128-NEXT: .param v128, v128{{$}}
312; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]313; SIMD128-NEXT: i16x8.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
314; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]315define <8 x i1> @compare_ult_v8i16 (<8 x i16> %x, <8 x i16> %y) {
316 %res = icmp ult <8 x i16> %x, %y
317 ret <8 x i1> %res
318}
319
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]320; CHECK-LABEL: compare_sext_ult_v8i16:
321; NO-SIMD128-NOT: i16x8
322; SIMD128-NEXT: .param v128, v128{{$}}
323; SIMD128-NEXT: .result v128{{$}}
324; SIMD128-NEXT: i16x8.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
325; SIMD128-NEXT: return $pop[[R]]{{$}}
326define <8 x i16> @compare_sext_ult_v8i16 (<8 x i16> %x, <8 x i16> %y) {
327 %cmp = icmp ult <8 x i16> %x, %y
328 %res = sext <8 x i1> %cmp to <8 x i16>
329 ret <8 x i16> %res
330}
331
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]332; CHECK-LABEL: compare_sle_v8i16:
333; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]334; SIMD128-NEXT: .param v128, v128{{$}}
335; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]336; SIMD128-NEXT: i16x8.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
337; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]338define <8 x i1> @compare_sle_v8i16 (<8 x i16> %x, <8 x i16> %y) {
339 %res = icmp sle <8 x i16> %x, %y
340 ret <8 x i1> %res
341}
342
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]343; CHECK-LABEL: compare_sext_sle_v8i16:
344; NO-SIMD128-NOT: i16x8
345; SIMD128-NEXT: .param v128, v128{{$}}
346; SIMD128-NEXT: .result v128{{$}}
347; SIMD128-NEXT: i16x8.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
348; SIMD128-NEXT: return $pop[[R]]{{$}}
349define <8 x i16> @compare_sext_sle_v8i16 (<8 x i16> %x, <8 x i16> %y) {
350 %cmp = icmp sle <8 x i16> %x, %y
351 %res = sext <8 x i1> %cmp to <8 x i16>
352 ret <8 x i16> %res
353}
354
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]355; CHECK-LABEL: compare_ule_v8i16:
356; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]357; SIMD128-NEXT: .param v128, v128{{$}}
358; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]359; SIMD128-NEXT: i16x8.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
360; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]361define <8 x i1> @compare_ule_v8i16 (<8 x i16> %x, <8 x i16> %y) {
362 %res = icmp ule <8 x i16> %x, %y
363 ret <8 x i1> %res
364}
365
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]366; CHECK-LABEL: compare_sext_ule_v8i16:
367; NO-SIMD128-NOT: i16x8
368; SIMD128-NEXT: .param v128, v128{{$}}
369; SIMD128-NEXT: .result v128{{$}}
370; SIMD128-NEXT: i16x8.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
371; SIMD128-NEXT: return $pop[[R]]{{$}}
372define <8 x i16> @compare_sext_ule_v8i16 (<8 x i16> %x, <8 x i16> %y) {
373 %cmp = icmp ule <8 x i16> %x, %y
374 %res = sext <8 x i1> %cmp to <8 x i16>
375 ret <8 x i16> %res
376}
377
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]378; CHECK-LABEL: compare_sgt_v8i16:
379; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]380; SIMD128-NEXT: .param v128, v128{{$}}
381; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]382; SIMD128-NEXT: i16x8.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
383; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]384define <8 x i1> @compare_sgt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
385 %res = icmp sgt <8 x i16> %x, %y
386 ret <8 x i1> %res
387}
388
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]389; CHECK-LABEL: compare_sext_sgt_v8i16:
390; NO-SIMD128-NOT: i16x8
391; SIMD128-NEXT: .param v128, v128{{$}}
392; SIMD128-NEXT: .result v128{{$}}
393; SIMD128-NEXT: i16x8.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
394; SIMD128-NEXT: return $pop[[R]]{{$}}
395define <8 x i16> @compare_sext_sgt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
396 %cmp = icmp sgt <8 x i16> %x, %y
397 %res = sext <8 x i1> %cmp to <8 x i16>
398 ret <8 x i16> %res
399}
400
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]401; CHECK-LABEL: compare_ugt_v8i16:
402; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]403; SIMD128-NEXT: .param v128, v128{{$}}
404; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]405; SIMD128-NEXT: i16x8.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
406; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]407define <8 x i1> @compare_ugt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
408 %res = icmp ugt <8 x i16> %x, %y
409 ret <8 x i1> %res
410}
411
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]412; CHECK-LABEL: compare_sext_ugt_v8i16:
413; NO-SIMD128-NOT: i16x8
414; SIMD128-NEXT: .param v128, v128{{$}}
415; SIMD128-NEXT: .result v128{{$}}
416; SIMD128-NEXT: i16x8.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
417; SIMD128-NEXT: return $pop[[R]]{{$}}
418define <8 x i16> @compare_sext_ugt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
419 %cmp = icmp ugt <8 x i16> %x, %y
420 %res = sext <8 x i1> %cmp to <8 x i16>
421 ret <8 x i16> %res
422}
423
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]424; CHECK-LABEL: compare_sge_v8i16:
425; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]426; SIMD128-NEXT: .param v128, v128{{$}}
427; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]428; SIMD128-NEXT: i16x8.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
429; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]430define <8 x i1> @compare_sge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
431 %res = icmp sge <8 x i16> %x, %y
432 ret <8 x i1> %res
433}
434
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]435; CHECK-LABEL: compare_sext_sge_v8i16:
436; NO-SIMD128-NOT: i16x8
437; SIMD128-NEXT: .param v128, v128{{$}}
438; SIMD128-NEXT: .result v128{{$}}
439; SIMD128-NEXT: i16x8.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
440; SIMD128-NEXT: return $pop[[R]]{{$}}
441define <8 x i16> @compare_sext_sge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
442 %cmp = icmp sge <8 x i16> %x, %y
443 %res = sext <8 x i1> %cmp to <8 x i16>
444 ret <8 x i16> %res
445}
446
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]447; CHECK-LABEL: compare_uge_v8i16:
448; NO-SIMD128-NOT: i16x8
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]449; SIMD128-NEXT: .param v128, v128{{$}}
450; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]451; SIMD128-NEXT: i16x8.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
452; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]453define <8 x i1> @compare_uge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
454 %res = icmp uge <8 x i16> %x, %y
455 ret <8 x i1> %res
456}
457
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]458; CHECK-LABEL: compare_sext_uge_v8i16:
459; NO-SIMD128-NOT: i16x8
460; SIMD128-NEXT: .param v128, v128{{$}}
461; SIMD128-NEXT: .result v128{{$}}
462; SIMD128-NEXT: i16x8.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
463; SIMD128-NEXT: return $pop[[R]]{{$}}
464define <8 x i16> @compare_sext_uge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
465 %cmp = icmp uge <8 x i16> %x, %y
466 %res = sext <8 x i1> %cmp to <8 x i16>
467 ret <8 x i16> %res
468}
469
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]470; CHECK-LABEL: compare_eq_v4i32:
471; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]472; SIMD128-NEXT: .param v128, v128{{$}}
473; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]474; SIMD128-NEXT: i32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
475; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]476define <4 x i1> @compare_eq_v4i32 (<4 x i32> %x, <4 x i32> %y) {
477 %res = icmp eq <4 x i32> %x, %y
478 ret <4 x i1> %res
479}
480
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]481; CHECK-LABEL: compare_sext_eq_v4i32:
482; NO-SIMD128-NOT: i32x4
483; SIMD128-NEXT: .param v128, v128{{$}}
484; SIMD128-NEXT: .result v128{{$}}
485; SIMD128-NEXT: i32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
486; SIMD128-NEXT: return $pop[[R]]{{$}}
487define <4 x i32> @compare_sext_eq_v4i32 (<4 x i32> %x, <4 x i32> %y) {
488 %cmp = icmp eq <4 x i32> %x, %y
489 %res = sext <4 x i1> %cmp to <4 x i32>
490 ret <4 x i32> %res
491}
492
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]493; CHECK-LABEL: compare_ne_v4i32:
494; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]495; SIMD128-NEXT: .param v128, v128{{$}}
496; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]497; SIMD128-NEXT: i32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
498; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]499define <4 x i1> @compare_ne_v4i32 (<4 x i32> %x, <4 x i32> %y) {
500 %res = icmp ne <4 x i32> %x, %y
501 ret <4 x i1> %res
502}
503
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]504; CHECK-LABEL: compare_sext_ne_v4i32:
505; NO-SIMD128-NOT: i32x4
506; SIMD128-NEXT: .param v128, v128{{$}}
507; SIMD128-NEXT: .result v128{{$}}
508; SIMD128-NEXT: i32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
509; SIMD128-NEXT: return $pop[[R]]{{$}}
510define <4 x i32> @compare_sext_ne_v4i32 (<4 x i32> %x, <4 x i32> %y) {
511 %cmp = icmp ne <4 x i32> %x, %y
512 %res = sext <4 x i1> %cmp to <4 x i32>
513 ret <4 x i32> %res
514}
515
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]516; CHECK-LABEL: compare_slt_v4i32:
517; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]518; SIMD128-NEXT: .param v128, v128{{$}}
519; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]520; SIMD128-NEXT: i32x4.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
521; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]522define <4 x i1> @compare_slt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
523 %res = icmp slt <4 x i32> %x, %y
524 ret <4 x i1> %res
525}
526
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]527; CHECK-LABEL: compare_sext_slt_v4i32:
528; NO-SIMD128-NOT: i32x4
529; SIMD128-NEXT: .param v128, v128{{$}}
530; SIMD128-NEXT: .result v128{{$}}
531; SIMD128-NEXT: i32x4.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
532; SIMD128-NEXT: return $pop[[R]]{{$}}
533define <4 x i32> @compare_sext_slt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
534 %cmp = icmp slt <4 x i32> %x, %y
535 %res = sext <4 x i1> %cmp to <4 x i32>
536 ret <4 x i32> %res
537}
538
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]539; CHECK-LABEL: compare_ult_v4i32:
540; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]541; SIMD128-NEXT: .param v128, v128{{$}}
542; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]543; SIMD128-NEXT: i32x4.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
544; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]545define <4 x i1> @compare_ult_v4i32 (<4 x i32> %x, <4 x i32> %y) {
546 %res = icmp ult <4 x i32> %x, %y
547 ret <4 x i1> %res
548}
549
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]550; CHECK-LABEL: compare_sext_ult_v4i32:
551; NO-SIMD128-NOT: i32x4
552; SIMD128-NEXT: .param v128, v128{{$}}
553; SIMD128-NEXT: .result v128{{$}}
554; SIMD128-NEXT: i32x4.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
555; SIMD128-NEXT: return $pop[[R]]{{$}}
556define <4 x i32> @compare_sext_ult_v4i32 (<4 x i32> %x, <4 x i32> %y) {
557 %cmp = icmp ult <4 x i32> %x, %y
558 %res = sext <4 x i1> %cmp to <4 x i32>
559 ret <4 x i32> %res
560}
561
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]562; CHECK-LABEL: compare_sle_v4i32:
563; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]564; SIMD128-NEXT: .param v128, v128{{$}}
565; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]566; SIMD128-NEXT: i32x4.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
567; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]568define <4 x i1> @compare_sle_v4i32 (<4 x i32> %x, <4 x i32> %y) {
569 %res = icmp sle <4 x i32> %x, %y
570 ret <4 x i1> %res
571}
572
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]573; CHECK-LABEL: compare_sext_sle_v4i32:
574; NO-SIMD128-NOT: i32x4
575; SIMD128-NEXT: .param v128, v128{{$}}
576; SIMD128-NEXT: .result v128{{$}}
577; SIMD128-NEXT: i32x4.le_s $push[[R:[0-9]+]]=, $0, $1{{$}}
578; SIMD128-NEXT: return $pop[[R]]{{$}}
579define <4 x i32> @compare_sext_sle_v4i32 (<4 x i32> %x, <4 x i32> %y) {
580 %cmp = icmp sle <4 x i32> %x, %y
581 %res = sext <4 x i1> %cmp to <4 x i32>
582 ret <4 x i32> %res
583}
584
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]585; CHECK-LABEL: compare_ule_v4i32:
586; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]587; SIMD128-NEXT: .param v128, v128{{$}}
588; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]589; SIMD128-NEXT: i32x4.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
590; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]591define <4 x i1> @compare_ule_v4i32 (<4 x i32> %x, <4 x i32> %y) {
592 %res = icmp ule <4 x i32> %x, %y
593 ret <4 x i1> %res
594}
595
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]596; CHECK-LABEL: compare_sext_ule_v4i32:
597; NO-SIMD128-NOT: i32x4
598; SIMD128-NEXT: .param v128, v128{{$}}
599; SIMD128-NEXT: .result v128{{$}}
600; SIMD128-NEXT: i32x4.le_u $push[[R:[0-9]+]]=, $0, $1{{$}}
601; SIMD128-NEXT: return $pop[[R]]{{$}}
602define <4 x i32> @compare_sext_ule_v4i32 (<4 x i32> %x, <4 x i32> %y) {
603 %cmp = icmp ule <4 x i32> %x, %y
604 %res = sext <4 x i1> %cmp to <4 x i32>
605 ret <4 x i32> %res
606}
607
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]608; CHECK-LABEL: compare_sgt_v4i32:
609; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]610; SIMD128-NEXT: .param v128, v128{{$}}
611; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]612; SIMD128-NEXT: i32x4.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
613; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]614define <4 x i1> @compare_sgt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
615 %res = icmp sgt <4 x i32> %x, %y
616 ret <4 x i1> %res
617}
618
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]619; CHECK-LABEL: compare_sext_sgt_v4i32:
620; NO-SIMD128-NOT: i32x4
621; SIMD128-NEXT: .param v128, v128{{$}}
622; SIMD128-NEXT: .result v128{{$}}
623; SIMD128-NEXT: i32x4.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}}
624; SIMD128-NEXT: return $pop[[R]]{{$}}
625define <4 x i32> @compare_sext_sgt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
626 %cmp = icmp sgt <4 x i32> %x, %y
627 %res = sext <4 x i1> %cmp to <4 x i32>
628 ret <4 x i32> %res
629}
630
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]631; CHECK-LABEL: compare_ugt_v4i32:
632; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]633; SIMD128-NEXT: .param v128, v128{{$}}
634; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]635; SIMD128-NEXT: i32x4.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
636; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]637define <4 x i1> @compare_ugt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
638 %res = icmp ugt <4 x i32> %x, %y
639 ret <4 x i1> %res
640}
641
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]642; CHECK-LABEL: compare_sext_ugt_v4i32:
643; NO-SIMD128-NOT: i32x4
644; SIMD128-NEXT: .param v128, v128{{$}}
645; SIMD128-NEXT: .result v128{{$}}
646; SIMD128-NEXT: i32x4.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}}
647; SIMD128-NEXT: return $pop[[R]]{{$}}
648define <4 x i32> @compare_sext_ugt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
649 %cmp = icmp ugt <4 x i32> %x, %y
650 %res = sext <4 x i1> %cmp to <4 x i32>
651 ret <4 x i32> %res
652}
653
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]654; CHECK-LABEL: compare_sge_v4i32:
655; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]656; SIMD128-NEXT: .param v128, v128{{$}}
657; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]658; SIMD128-NEXT: i32x4.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
659; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]660define <4 x i1> @compare_sge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
661 %res = icmp sge <4 x i32> %x, %y
662 ret <4 x i1> %res
663}
664
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]665; CHECK-LABEL: compare_sext_sge_v4i32:
666; NO-SIMD128-NOT: i32x4
667; SIMD128-NEXT: .param v128, v128{{$}}
668; SIMD128-NEXT: .result v128{{$}}
669; SIMD128-NEXT: i32x4.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}}
670; SIMD128-NEXT: return $pop[[R]]{{$}}
671define <4 x i32> @compare_sext_sge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
672 %cmp = icmp sge <4 x i32> %x, %y
673 %res = sext <4 x i1> %cmp to <4 x i32>
674 ret <4 x i32> %res
675}
676
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]677; CHECK-LABEL: compare_uge_v4i32:
678; NO-SIMD128-NOT: i32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]679; SIMD128-NEXT: .param v128, v128{{$}}
680; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]681; SIMD128-NEXT: i32x4.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
682; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]683define <4 x i1> @compare_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
684 %res = icmp uge <4 x i32> %x, %y
685 ret <4 x i1> %res
686}
687
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]688; CHECK-LABEL: compare_sext_uge_v4i32:
689; NO-SIMD128-NOT: i32x4
690; SIMD128-NEXT: .param v128, v128{{$}}
691; SIMD128-NEXT: .result v128{{$}}
692; SIMD128-NEXT: i32x4.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}}
693; SIMD128-NEXT: return $pop[[R]]{{$}}
694define <4 x i32> @compare_sext_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
695 %cmp = icmp uge <4 x i32> %x, %y
696 %res = sext <4 x i1> %cmp to <4 x i32>
697 ret <4 x i32> %res
698}
699
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]700; CHECK-LABEL: compare_oeq_v4f32:
701; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]702; SIMD128-NEXT: .param v128, v128{{$}}
703; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]704; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
705; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]706define <4 x i1> @compare_oeq_v4f32 (<4 x float> %x, <4 x float> %y) {
707 %res = fcmp oeq <4 x float> %x, %y
708 ret <4 x i1> %res
709}
710
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]711; CHECK-LABEL: compare_sext_oeq_v4f32:
712; NO-SIMD128-NOT: f32x4
713; SIMD128-NEXT: .param v128, v128{{$}}
714; SIMD128-NEXT: .result v128{{$}}
715; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
716; SIMD128-NEXT: return $pop[[R]]{{$}}
717define <4 x i32> @compare_sext_oeq_v4f32 (<4 x float> %x, <4 x float> %y) {
718 %cmp = fcmp oeq <4 x float> %x, %y
719 %res = sext <4 x i1> %cmp to <4 x i32>
720 ret <4 x i32> %res
721}
722
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]723; CHECK-LABEL: compare_ogt_v4f32:
724; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]725; SIMD128-NEXT: .param v128, v128{{$}}
726; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]727; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
728; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]729define <4 x i1> @compare_ogt_v4f32 (<4 x float> %x, <4 x float> %y) {
730 %res = fcmp ogt <4 x float> %x, %y
731 ret <4 x i1> %res
732}
733
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]734; CHECK-LABEL: compare_sext_ogt_v4f32:
735; NO-SIMD128-NOT: f32x4
736; SIMD128-NEXT: .param v128, v128{{$}}
737; SIMD128-NEXT: .result v128{{$}}
738; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
739; SIMD128-NEXT: return $pop[[R]]{{$}}
740define <4 x i32> @compare_sext_ogt_v4f32 (<4 x float> %x, <4 x float> %y) {
741 %cmp = fcmp ogt <4 x float> %x, %y
742 %res = sext <4 x i1> %cmp to <4 x i32>
743 ret <4 x i32> %res
744}
745
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]746; CHECK-LABEL: compare_oge_v4f32:
747; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]748; SIMD128-NEXT: .param v128, v128{{$}}
749; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]750; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
751; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]752define <4 x i1> @compare_oge_v4f32 (<4 x float> %x, <4 x float> %y) {
753 %res = fcmp oge <4 x float> %x, %y
754 ret <4 x i1> %res
755}
756
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]757; CHECK-LABEL: compare_sext_oge_v4f32:
758; NO-SIMD128-NOT: f32x4
759; SIMD128-NEXT: .param v128, v128{{$}}
760; SIMD128-NEXT: .result v128{{$}}
761; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
762; SIMD128-NEXT: return $pop[[R]]{{$}}
763define <4 x i32> @compare_sext_oge_v4f32 (<4 x float> %x, <4 x float> %y) {
764 %cmp = fcmp oge <4 x float> %x, %y
765 %res = sext <4 x i1> %cmp to <4 x i32>
766 ret <4 x i32> %res
767}
768
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]769; CHECK-LABEL: compare_olt_v4f32:
770; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]771; SIMD128-NEXT: .param v128, v128{{$}}
772; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]773; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
774; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]775define <4 x i1> @compare_olt_v4f32 (<4 x float> %x, <4 x float> %y) {
776 %res = fcmp olt <4 x float> %x, %y
777 ret <4 x i1> %res
778}
779
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]780; CHECK-LABEL: compare_sext_olt_v4f32:
781; NO-SIMD128-NOT: f32x4
782; SIMD128-NEXT: .param v128, v128{{$}}
783; SIMD128-NEXT: .result v128{{$}}
784; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
785; SIMD128-NEXT: return $pop[[R]]{{$}}
786define <4 x i32> @compare_sext_olt_v4f32 (<4 x float> %x, <4 x float> %y) {
787 %cmp = fcmp olt <4 x float> %x, %y
788 %res = sext <4 x i1> %cmp to <4 x i32>
789 ret <4 x i32> %res
790}
791
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]792; CHECK-LABEL: compare_ole_v4f32:
793; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]794; SIMD128-NEXT: .param v128, v128{{$}}
795; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]796; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}}
797; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]798define <4 x i1> @compare_ole_v4f32 (<4 x float> %x, <4 x float> %y) {
799 %res = fcmp ole <4 x float> %x, %y
800 ret <4 x i1> %res
801}
802
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]803; CHECK-LABEL: compare_sext_ole_v4f32:
804; NO-SIMD128-NOT: f32x4
805; SIMD128-NEXT: .param v128, v128{{$}}
806; SIMD128-NEXT: .result v128{{$}}
807; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}}
808; SIMD128-NEXT: return $pop[[R]]{{$}}
809define <4 x i32> @compare_sext_ole_v4f32 (<4 x float> %x, <4 x float> %y) {
810 %cmp = fcmp ole <4 x float> %x, %y
811 %res = sext <4 x i1> %cmp to <4 x i32>
812 ret <4 x i32> %res
813}
814
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]815; CHECK-LABEL: compare_one_v4f32:
816; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]817; SIMD128-NEXT: .param v128, v128{{$}}
818; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]819; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $1{{$}}
820; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $0, $0{{$}}
821; SIMD128-NEXT: f32x4.eq $push[[T2:[0-9]+]]=, $1, $1{{$}}
822; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
823; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
824; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]825define <4 x i1> @compare_one_v4f32 (<4 x float> %x, <4 x float> %y) {
826 %res = fcmp one <4 x float> %x, %y
827 ret <4 x i1> %res
828}
829
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]830; CHECK-LABEL: compare_sext_one_v4f32:
831; NO-SIMD128-NOT: f32x4
832; SIMD128-NEXT: .param v128, v128{{$}}
833; SIMD128-NEXT: .result v128{{$}}
834; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $1{{$}}
835; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $0, $0{{$}}
836; SIMD128-NEXT: f32x4.eq $push[[T2:[0-9]+]]=, $1, $1{{$}}
837; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
838; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
839; SIMD128-NEXT: return $pop[[R]]{{$}}
840define <4 x i32> @compare_sext_one_v4f32 (<4 x float> %x, <4 x float> %y) {
841 %cmp = fcmp one <4 x float> %x, %y
842 %res = sext <4 x i1> %cmp to <4 x i32>
843 ret <4 x i32> %res
844}
845
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]846; CHECK-LABEL: compare_ord_v4f32:
847; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]848; SIMD128-NEXT: .param v128, v128{{$}}
849; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]850; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
851; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
852; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
853; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]854define <4 x i1> @compare_ord_v4f32 (<4 x float> %x, <4 x float> %y) {
855 %res = fcmp ord <4 x float> %x, %y
856 ret <4 x i1> %res
857}
858
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]859; CHECK-LABEL: compare_sext_ord_v4f32:
860; NO-SIMD128-NOT: f32x4
861; SIMD128-NEXT: .param v128, v128{{$}}
862; SIMD128-NEXT: .result v128{{$}}
863; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
864; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
865; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
866; SIMD128-NEXT: return $pop[[R]]{{$}}
867define <4 x i32> @compare_sext_ord_v4f32 (<4 x float> %x, <4 x float> %y) {
868 %cmp = fcmp ord <4 x float> %x, %y
869 %res = sext <4 x i1> %cmp to <4 x i32>
870 ret <4 x i32> %res
871}
872
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]873; CHECK-LABEL: compare_ueq_v4f32:
874; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]875; SIMD128-NEXT: .param v128, v128{{$}}
876; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]877; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $1{{$}}
878; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $0, $0{{$}}
879; SIMD128-NEXT: f32x4.ne $push[[T2:[0-9]+]]=, $1, $1{{$}}
880; SIMD128-NEXT: v128.or $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
881; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
882; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]883define <4 x i1> @compare_ueq_v4f32 (<4 x float> %x, <4 x float> %y) {
884 %res = fcmp ueq <4 x float> %x, %y
885 ret <4 x i1> %res
886}
887
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]888; CHECK-LABEL: compare_sext_ueq_v4f32:
889; NO-SIMD128-NOT: f32x4
890; SIMD128-NEXT: .param v128, v128{{$}}
891; SIMD128-NEXT: .result v128{{$}}
892; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $1{{$}}
893; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $0, $0{{$}}
894; SIMD128-NEXT: f32x4.ne $push[[T2:[0-9]+]]=, $1, $1{{$}}
895; SIMD128-NEXT: v128.or $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
896; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
897; SIMD128-NEXT: return $pop[[R]]
898define <4 x i32> @compare_sext_ueq_v4f32 (<4 x float> %x, <4 x float> %y) {
899 %cmp = fcmp ueq <4 x float> %x, %y
900 %res = sext <4 x i1> %cmp to <4 x i32>
901 ret <4 x i32> %res
902}
903
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]904; CHECK-LABEL: compare_ugt_v4f32:
905; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]906; SIMD128-NEXT: .param v128, v128{{$}}
907; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]908; SIMD128-NEXT: f32x4.le $push[[T0:[0-9]+]]=, $0, $1{{$}}
909; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
910; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]911define <4 x i1> @compare_ugt_v4f32 (<4 x float> %x, <4 x float> %y) {
912 %res = fcmp ugt <4 x float> %x, %y
913 ret <4 x i1> %res
914}
915
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]916; CHECK-LABEL: compare_sext_ugt_v4f32:
917; NO-SIMD128-NOT: f32x4
918; SIMD128-NEXT: .param v128, v128{{$}}
919; SIMD128-NEXT: .result v128{{$}}
920; SIMD128-NEXT: f32x4.le $push[[T0:[0-9]+]]=, $0, $1{{$}}
921; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
922; SIMD128-NEXT: return $pop[[R]]{{$}}
923define <4 x i32> @compare_sext_ugt_v4f32 (<4 x float> %x, <4 x float> %y) {
924 %cmp = fcmp ugt <4 x float> %x, %y
925 %res = sext <4 x i1> %cmp to <4 x i32>
926 ret <4 x i32> %res
927}
928
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]929; CHECK-LABEL: compare_uge_v4f32:
930; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]931; SIMD128-NEXT: .param v128, v128{{$}}
932; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]933; SIMD128-NEXT: f32x4.lt $push[[T0:[0-9]+]]=, $0, $1{{$}}
934; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
935; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]936define <4 x i1> @compare_uge_v4f32 (<4 x float> %x, <4 x float> %y) {
937 %res = fcmp uge <4 x float> %x, %y
938 ret <4 x i1> %res
939}
940
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]941; CHECK-LABEL: compare_sext_uge_v4f32:
942; NO-SIMD128-NOT: f32x4
943; SIMD128-NEXT: .param v128, v128{{$}}
944; SIMD128-NEXT: .result v128{{$}}
945; SIMD128-NEXT: f32x4.lt $push[[T0:[0-9]+]]=, $0, $1{{$}}
946; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
947; SIMD128-NEXT: return $pop[[R]]{{$}}
948define <4 x i32> @compare_sext_uge_v4f32 (<4 x float> %x, <4 x float> %y) {
949 %cmp = fcmp uge <4 x float> %x, %y
950 %res = sext <4 x i1> %cmp to <4 x i32>
951 ret <4 x i32> %res
952}
953
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]954; CHECK-LABEL: compare_ult_v4f32:
955; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]956; SIMD128-NEXT: .param v128, v128{{$}}
957; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]958; SIMD128-NEXT: f32x4.ge $push[[T0:[0-9]+]]=, $0, $1{{$}}
959; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
960; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]961define <4 x i1> @compare_ult_v4f32 (<4 x float> %x, <4 x float> %y) {
962 %res = fcmp ult <4 x float> %x, %y
963 ret <4 x i1> %res
964}
965
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]966; CHECK-LABEL: compare_sext_ult_v4f32:
967; NO-SIMD128-NOT: f32x4
968; SIMD128-NEXT: .param v128, v128{{$}}
969; SIMD128-NEXT: .result v128{{$}}
970; SIMD128-NEXT: f32x4.ge $push[[T0:[0-9]+]]=, $0, $1{{$}}
971; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
972; SIMD128-NEXT: return $pop[[R]]{{$}}
973define <4 x i32> @compare_sext_ult_v4f32 (<4 x float> %x, <4 x float> %y) {
974 %cmp = fcmp ult <4 x float> %x, %y
975 %res = sext <4 x i1> %cmp to <4 x i32>
976 ret <4 x i32> %res
977}
978
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]979; CHECK-LABEL: compare_ule_v4f32:
980; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]981; SIMD128-NEXT: .param v128, v128{{$}}
982; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]983; SIMD128-NEXT: f32x4.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
984; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
985; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]986define <4 x i1> @compare_ule_v4f32 (<4 x float> %x, <4 x float> %y) {
987 %res = fcmp ule <4 x float> %x, %y
988 ret <4 x i1> %res
989}
990
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]991; CHECK-LABEL: compare_sext_ule_v4f32:
992; NO-SIMD128-NOT: f32x4
993; SIMD128-NEXT: .param v128, v128{{$}}
994; SIMD128-NEXT: .result v128{{$}}
995; SIMD128-NEXT: f32x4.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
996; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
997; SIMD128-NEXT: return $pop[[R]]{{$}}
998define <4 x i32> @compare_sext_ule_v4f32 (<4 x float> %x, <4 x float> %y) {
999 %cmp = fcmp ule <4 x float> %x, %y
1000 %res = sext <4 x i1> %cmp to <4 x i32>
1001 ret <4 x i32> %res
1002}
1003
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1004; CHECK-LABEL: compare_une_v4f32:
1005; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1006; SIMD128-NEXT: .param v128, v128{{$}}
1007; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1008; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]1009; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1010define <4 x i1> @compare_une_v4f32 (<4 x float> %x, <4 x float> %y) {
1011 %res = fcmp une <4 x float> %x, %y
1012 ret <4 x i1> %res
1013}
1014
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1015; CHECK-LABEL: compare_sext_une_v4f32:
1016; NO-SIMD128-NOT: f32x4
1017; SIMD128-NEXT: .param v128, v128{{$}}
1018; SIMD128-NEXT: .result v128{{$}}
1019; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
1020; SIMD128-NEXT: return $pop[[R]]{{$}}
1021define <4 x i32> @compare_sext_une_v4f32 (<4 x float> %x, <4 x float> %y) {
1022 %cmp = fcmp une <4 x float> %x, %y
1023 %res = sext <4 x i1> %cmp to <4 x i32>
1024 ret <4 x i32> %res
1025}
1026
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1027; CHECK-LABEL: compare_uno_v4f32:
1028; NO-SIMD128-NOT: f32x4
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1029; SIMD128-NEXT: .param v128, v128{{$}}
1030; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1031; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
1032; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
1033; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
1034; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1035define <4 x i1> @compare_uno_v4f32 (<4 x float> %x, <4 x float> %y) {
1036 %res = fcmp uno <4 x float> %x, %y
1037 ret <4 x i1> %res
1038}
1039
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1040; CHECK-LABEL: compare_sext_uno_v4f32:
1041; NO-SIMD128-NOT: f32x4
1042; SIMD128-NEXT: .param v128, v128{{$}}
1043; SIMD128-NEXT: .result v128{{$}}
1044; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
1045; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
1046; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
1047; SIMD128-NEXT: return $pop[[R]]{{$}}
1048define <4 x i32> @compare_sext_uno_v4f32 (<4 x float> %x, <4 x float> %y) {
1049 %cmp = fcmp uno <4 x float> %x, %y
1050 %res = sext <4 x i1> %cmp to <4 x i32>
1051 ret <4 x i32> %res
1052}
1053
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1054; CHECK-LABEL: compare_oeq_v2f64:
1055; NO-SIMD128-NOT: f64x2
1056; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1057; SIMD128-NEXT: .param v128, v128{{$}}
1058; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]1059; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
1060; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1061define <2 x i1> @compare_oeq_v2f64 (<2 x double> %x, <2 x double> %y) {
1062 %res = fcmp oeq <2 x double> %x, %y
1063 ret <2 x i1> %res
1064}
1065
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1066; CHECK-LABEL: compare_sext_oeq_v2f64:
1067; NO-SIMD128-NOT: f64x2
1068; SIMD128-VM-NOT: f64x2
1069; SIMD128-NEXT: .param v128, v128{{$}}
1070; SIMD128-NEXT: .result v128{{$}}
1071; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
1072; SIMD128-NEXT: return $pop[[R]]{{$}}
1073define <2 x i64> @compare_sext_oeq_v2f64 (<2 x double> %x, <2 x double> %y) {
1074 %cmp = fcmp oeq <2 x double> %x, %y
1075 %res = sext <2 x i1> %cmp to <2 x i64>
1076 ret <2 x i64> %res
1077}
1078
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1079; CHECK-LABEL: compare_ogt_v2f64:
1080; NO-SIMD128-NOT: f64x2
1081; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1082; SIMD128-NEXT: .param v128, v128{{$}}
1083; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]1084; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
1085; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1086define <2 x i1> @compare_ogt_v2f64 (<2 x double> %x, <2 x double> %y) {
1087 %res = fcmp ogt <2 x double> %x, %y
1088 ret <2 x i1> %res
1089}
1090
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1091; CHECK-LABEL: compare_sext_ogt_v2f64:
1092; NO-SIMD128-NOT: f64x2
1093; SIMD128-VM-NOT: f64x2
1094; SIMD128-NEXT: .param v128, v128{{$}}
1095; SIMD128-NEXT: .result v128{{$}}
1096; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}}
1097; SIMD128-NEXT: return $pop[[R]]{{$}}
1098define <2 x i64> @compare_sext_ogt_v2f64 (<2 x double> %x, <2 x double> %y) {
1099 %cmp = fcmp ogt <2 x double> %x, %y
1100 %res = sext <2 x i1> %cmp to <2 x i64>
1101 ret <2 x i64> %res
1102}
1103
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1104; CHECK-LABEL: compare_oge_v2f64:
1105; NO-SIMD128-NOT: f64x2
1106; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1107; SIMD128-NEXT: .param v128, v128{{$}}
1108; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]1109; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
1110; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1111define <2 x i1> @compare_oge_v2f64 (<2 x double> %x, <2 x double> %y) {
1112 %res = fcmp oge <2 x double> %x, %y
1113 ret <2 x i1> %res
1114}
1115
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1116; CHECK-LABEL: compare_sext_oge_v2f64:
1117; NO-SIMD128-NOT: f64x2
1118; SIMD128-VM-NOT: f64x2
1119; SIMD128-NEXT: .param v128, v128{{$}}
1120; SIMD128-NEXT: .result v128{{$}}
1121; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}}
1122; SIMD128-NEXT: return $pop[[R]]{{$}}
1123define <2 x i64> @compare_sext_oge_v2f64 (<2 x double> %x, <2 x double> %y) {
1124 %cmp = fcmp oge <2 x double> %x, %y
1125 %res = sext <2 x i1> %cmp to <2 x i64>
1126 ret <2 x i64> %res
1127}
1128
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1129; CHECK-LABEL: compare_olt_v2f64:
1130; NO-SIMD128-NOT: f64x2
1131; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1132; SIMD128-NEXT: .param v128, v128{{$}}
1133; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]1134; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
1135; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1136define <2 x i1> @compare_olt_v2f64 (<2 x double> %x, <2 x double> %y) {
1137 %res = fcmp olt <2 x double> %x, %y
1138 ret <2 x i1> %res
1139}
1140
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1141; CHECK-LABEL: compare_sext_olt_v2f64:
1142; NO-SIMD128-NOT: f64x2
1143; SIMD128-VM-NOT: f64x2
1144; SIMD128-NEXT: .param v128, v128{{$}}
1145; SIMD128-NEXT: .result v128{{$}}
1146; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}}
1147; SIMD128-NEXT: return $pop[[R]]{{$}}
1148define <2 x i64> @compare_sext_olt_v2f64 (<2 x double> %x, <2 x double> %y) {
1149 %cmp = fcmp olt <2 x double> %x, %y
1150 %res = sext <2 x i1> %cmp to <2 x i64>
1151 ret <2 x i64> %res
1152}
1153
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1154; CHECK-LABEL: compare_ole_v2f64:
1155; NO-SIMD128-NOT: f64x2
1156; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1157; SIMD128-NEXT: .param v128, v128{{$}}
1158; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]1159; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}}
1160; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1161define <2 x i1> @compare_ole_v2f64 (<2 x double> %x, <2 x double> %y) {
1162 %res = fcmp ole <2 x double> %x, %y
1163 ret <2 x i1> %res
1164}
1165
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1166; CHECK-LABEL: compare_sext_ole_v2f64:
1167; NO-SIMD128-NOT: f64x2
1168; SIMD128-VM-NOT: f64x2
1169; SIMD128-NEXT: .param v128, v128{{$}}
1170; SIMD128-NEXT: .result v128{{$}}
1171; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}}
1172; SIMD128-NEXT: return $pop[[R]]{{$}}
1173define <2 x i64> @compare_sext_ole_v2f64 (<2 x double> %x, <2 x double> %y) {
1174 %cmp = fcmp ole <2 x double> %x, %y
1175 %res = sext <2 x i1> %cmp to <2 x i64>
1176 ret <2 x i64> %res
1177}
1178
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1179; CHECK-LABEL: compare_one_v2f64:
1180; NO-SIMD128-NOT: f64x2
1181; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1182; SIMD128-NEXT: .param v128, v128{{$}}
1183; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1184; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $1{{$}}
1185; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $0, $0{{$}}
1186; SIMD128-NEXT: f64x2.eq $push[[T2:[0-9]+]]=, $1, $1{{$}}
1187; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
1188; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
1189; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1190define <2 x i1> @compare_one_v2f64 (<2 x double> %x, <2 x double> %y) {
1191 %res = fcmp one <2 x double> %x, %y
1192 ret <2 x i1> %res
1193}
1194
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1195; CHECK-LABEL: compare_sext_one_v2f64:
1196; NO-SIMD128-NOT: f64x2
1197; SIMD128-VM-NOT: f64x2
1198; SIMD128-NEXT: .param v128, v128{{$}}
1199; SIMD128-NEXT: .result v128{{$}}
1200; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $1{{$}}
1201; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $0, $0{{$}}
1202; SIMD128-NEXT: f64x2.eq $push[[T2:[0-9]+]]=, $1, $1{{$}}
1203; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
1204; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
1205; SIMD128-NEXT: return $pop[[R]]{{$}}
1206define <2 x i64> @compare_sext_one_v2f64 (<2 x double> %x, <2 x double> %y) {
1207 %cmp = fcmp one <2 x double> %x, %y
1208 %res = sext <2 x i1> %cmp to <2 x i64>
1209 ret <2 x i64> %res
1210}
1211
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1212; CHECK-LABEL: compare_ord_v2f64:
1213; NO-SIMD128-NOT: f64x2
1214; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1215; SIMD128-NEXT: .param v128, v128{{$}}
1216; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1217; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
1218; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
1219; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
1220; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1221define <2 x i1> @compare_ord_v2f64 (<2 x double> %x, <2 x double> %y) {
1222 %res = fcmp ord <2 x double> %x, %y
1223 ret <2 x i1> %res
1224}
1225
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1226; CHECK-LABEL: compare_sext_ord_v2f64:
1227; NO-SIMD128-NOT: f64x2
1228; SIMD128-VM-NOT: f64x2
1229; SIMD128-NEXT: .param v128, v128{{$}}
1230; SIMD128-NEXT: .result v128{{$}}
1231; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}}
1232; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}}
1233; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
1234; SIMD128-NEXT: return $pop[[R]]{{$}}
1235define <2 x i64> @compare_sext_ord_v2f64 (<2 x double> %x, <2 x double> %y) {
1236 %cmp = fcmp ord <2 x double> %x, %y
1237 %res = sext <2 x i1> %cmp to <2 x i64>
1238 ret <2 x i64> %res
1239}
1240
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1241; CHECK-LABEL: compare_ueq_v2f64:
1242; NO-SIMD128-NOT: f64x2
1243; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1244; SIMD128-NEXT: .param v128, v128{{$}}
1245; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1246; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $1{{$}}
1247; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $0, $0{{$}}
1248; SIMD128-NEXT: f64x2.ne $push[[T2:[0-9]+]]=, $1, $1{{$}}
1249; SIMD128-NEXT: v128.or $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
1250; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
1251; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1252define <2 x i1> @compare_ueq_v2f64 (<2 x double> %x, <2 x double> %y) {
1253 %res = fcmp ueq <2 x double> %x, %y
1254 ret <2 x i1> %res
1255}
1256
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1257; CHECK-LABEL: compare_sext_ueq_v2f64:
1258; NO-SIMD128-NOT: f64x2
1259; SIMD128-VM-NOT: f64x2
1260; SIMD128-NEXT: .param v128, v128{{$}}
1261; SIMD128-NEXT: .result v128{{$}}
1262; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $1{{$}}
1263; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $0, $0{{$}}
1264; SIMD128-NEXT: f64x2.ne $push[[T2:[0-9]+]]=, $1, $1{{$}}
1265; SIMD128-NEXT: v128.or $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}}
1266; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}}
1267; SIMD128-NEXT: return $pop[[R]]{{$}}
1268define <2 x i64> @compare_sext_ueq_v2f64 (<2 x double> %x, <2 x double> %y) {
1269 %cmp = fcmp ueq <2 x double> %x, %y
1270 %res = sext <2 x i1> %cmp to <2 x i64>
1271 ret <2 x i64> %res
1272}
1273
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1274; CHECK-LABEL: compare_ugt_v2f64:
1275; NO-SIMD128-NOT: f64x2
1276; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1277; SIMD128-NEXT: .param v128, v128{{$}}
1278; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1279; SIMD128-NEXT: f64x2.le $push[[T0:[0-9]+]]=, $0, $1{{$}}
1280; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
1281; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1282define <2 x i1> @compare_ugt_v2f64 (<2 x double> %x, <2 x double> %y) {
1283 %res = fcmp ugt <2 x double> %x, %y
1284 ret <2 x i1> %res
1285}
1286
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1287; CHECK-LABEL: compare_sext_ugt_v2f64:
1288; NO-SIMD128-NOT: f64x2
1289; SIMD128-VM-NOT: f64x2
1290; SIMD128-NEXT: .param v128, v128{{$}}
1291; SIMD128-NEXT: .result v128{{$}}
1292; SIMD128-NEXT: f64x2.le $push[[T0:[0-9]+]]=, $0, $1{{$}}
1293; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
1294; SIMD128-NEXT: return $pop[[R]]{{$}}
1295define <2 x i64> @compare_sext_ugt_v2f64 (<2 x double> %x, <2 x double> %y) {
1296 %cmp = fcmp ugt <2 x double> %x, %y
1297 %res = sext <2 x i1> %cmp to <2 x i64>
1298 ret <2 x i64> %res
1299}
1300
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1301; CHECK-LABEL: compare_uge_v2f64:
1302; NO-SIMD128-NOT: f64x2
1303; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1304; SIMD128-NEXT: .param v128, v128{{$}}
1305; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1306; SIMD128-NEXT: f64x2.lt $push[[T0:[0-9]+]]=, $0, $1{{$}}
1307; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
1308; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1309define <2 x i1> @compare_uge_v2f64 (<2 x double> %x, <2 x double> %y) {
1310 %res = fcmp uge <2 x double> %x, %y
1311 ret <2 x i1> %res
1312}
1313
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1314; CHECK-LABEL: compare_sext_uge_v2f64:
1315; NO-SIMD128-NOT: f64x2
1316; SIMD128-VM-NOT: f64x2
1317; SIMD128-NEXT: .param v128, v128{{$}}
1318; SIMD128-NEXT: .result v128{{$}}
1319; SIMD128-NEXT: f64x2.lt $push[[T0:[0-9]+]]=, $0, $1{{$}}
1320; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
1321; SIMD128-NEXT: return $pop[[R]]{{$}}
1322define <2 x i64> @compare_sext_uge_v2f64 (<2 x double> %x, <2 x double> %y) {
1323 %cmp = fcmp uge <2 x double> %x, %y
1324 %res = sext <2 x i1> %cmp to <2 x i64>
1325 ret <2 x i64> %res
1326}
1327
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1328; CHECK-LABEL: compare_ult_v2f64:
1329; NO-SIMD128-NOT: f64x2
1330; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1331; SIMD128-NEXT: .param v128, v128{{$}}
1332; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1333; SIMD128-NEXT: f64x2.ge $push[[T0:[0-9]+]]=, $0, $1{{$}}
1334; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
1335; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1336define <2 x i1> @compare_ult_v2f64 (<2 x double> %x, <2 x double> %y) {
1337 %res = fcmp ult <2 x double> %x, %y
1338 ret <2 x i1> %res
1339}
1340
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1341; CHECK-LABEL: compare_sext_ult_v2f64:
1342; NO-SIMD128-NOT: f64x2
1343; SIMD128-VM-NOT: f64x2
1344; SIMD128-NEXT: .param v128, v128{{$}}
1345; SIMD128-NEXT: .result v128{{$}}
1346; SIMD128-NEXT: f64x2.ge $push[[T0:[0-9]+]]=, $0, $1{{$}}
1347; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
1348; SIMD128-NEXT: return $pop[[R]]{{$}}
1349define <2 x i64> @compare_sext_ult_v2f64 (<2 x double> %x, <2 x double> %y) {
1350 %cmp = fcmp ult <2 x double> %x, %y
1351 %res = sext <2 x i1> %cmp to <2 x i64>
1352 ret <2 x i64> %res
1353}
1354
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1355; CHECK-LABEL: compare_ule_v2f64:
1356; NO-SIMD128-NOT: f64x2
1357; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1358; SIMD128-NEXT: .param v128, v128{{$}}
1359; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1360; SIMD128-NEXT: f64x2.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
1361; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
1362; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1363define <2 x i1> @compare_ule_v2f64 (<2 x double> %x, <2 x double> %y) {
1364 %res = fcmp ule <2 x double> %x, %y
1365 ret <2 x i1> %res
1366}
1367
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1368; CHECK-LABEL: compare_sext_ule_v2f64:
1369; NO-SIMD128-NOT: f64x2
1370; SIMD128-VM-NOT: f64x2
1371; SIMD128-NEXT: .param v128, v128{{$}}
1372; SIMD128-NEXT: .result v128{{$}}
1373; SIMD128-NEXT: f64x2.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
1374; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
1375; SIMD128-NEXT: return $pop[[R]]{{$}}
1376define <2 x i64> @compare_sext_ule_v2f64 (<2 x double> %x, <2 x double> %y) {
1377 %cmp = fcmp ule <2 x double> %x, %y
1378 %res = sext <2 x i1> %cmp to <2 x i64>
1379 ret <2 x i64> %res
1380}
1381
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1382; CHECK-LABEL: compare_une_v2f64:
1383; NO-SIMD128-NOT: f64x2
1384; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1385; SIMD128-NEXT: .param v128, v128{{$}}
1386; SIMD128-NEXT: .result v128{{$}}
Thomas Lively66f3dc02018-09-15 01:12:48 +0000[diff] [blame]1387; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
1388; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1389define <2 x i1> @compare_une_v2f64 (<2 x double> %x, <2 x double> %y) {
1390 %res = fcmp une <2 x double> %x, %y
1391 ret <2 x i1> %res
1392}
1393
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1394; CHECK-LABEL: compare_sext_une_v2f64:
1395; NO-SIMD128-NOT: f64x2
1396; SIMD128-VM-NOT: f64x2
1397; SIMD128-NEXT: .param v128, v128{{$}}
1398; SIMD128-NEXT: .result v128{{$}}
1399; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}}
1400; SIMD128-NEXT: return $pop[[R]]{{$}}
1401define <2 x i64> @compare_sext_une_v2f64 (<2 x double> %x, <2 x double> %y) {
1402 %cmp = fcmp une <2 x double> %x, %y
1403 %res = sext <2 x i1> %cmp to <2 x i64>
1404 ret <2 x i64> %res
1405}
1406
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1407; CHECK-LABEL: compare_uno_v2f64:
1408; NO-SIMD128-NOT: f64x2
1409; SIMD128-VM-NOT: f64x2
Thomas Livelya3937b22018-09-14 21:21:42 +0000[diff] [blame]1410; SIMD128-NEXT: .param v128, v128{{$}}
1411; SIMD128-NEXT: .result v128{{$}}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1412; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
1413; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
1414; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
1415; SIMD128-NEXT: return $pop[[R]]{{$}}
Thomas Livelyebd4c902018-09-12 17:56:00 +0000[diff] [blame]1416define <2 x i1> @compare_uno_v2f64 (<2 x double> %x, <2 x double> %y) {
1417 %res = fcmp uno <2 x double> %x, %y
1418 ret <2 x i1> %res
1419}
Thomas Lively5ea17d42018-10-20 01:35:23 +0000[diff] [blame^]1420
1421; CHECK-LABEL: compare_sext_uno_v2f64:
1422; NO-SIMD128-NOT: f64x2
1423; SIMD128-VM-NOT: f64x2
1424; SIMD128-NEXT: .param v128, v128{{$}}
1425; SIMD128-NEXT: .result v128{{$}}
1426; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}}
1427; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}}
1428; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}}
1429; SIMD128-NEXT: return $pop[[R]]{{$}}
1430define <2 x i64> @compare_sext_uno_v2f64 (<2 x double> %x, <2 x double> %y) {
1431 %cmp = fcmp uno <2 x double> %x, %y
1432 %res = sext <2 x i1> %cmp to <2 x i64>
1433 ret <2 x i64> %res
1434}