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Dan Gohman0cfb5f82016-05-10 04:24:02 +00001//===- WebAssemblyPrepareForLiveIntervals.cpp - Prepare for LiveIntervals -===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
Adrian Prantl5f8f34e42018-05-01 15:54:18 +000011/// Fix up code to meet LiveInterval's requirements.
Dan Gohman0cfb5f82016-05-10 04:24:02 +000012///
13/// Some CodeGen passes don't preserve LiveInterval's requirements, because
14/// they run after register allocation and it isn't important. However,
15/// WebAssembly runs LiveIntervals in a late pass. This pass transforms code
16/// to meet LiveIntervals' requirements; primarily, it ensures that all
17/// virtual register uses have definitions (IMPLICIT_DEF definitions if
18/// nothing else).
19///
20//===----------------------------------------------------------------------===//
21
Dan Gohman0cfb5f82016-05-10 04:24:02 +000022#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
Chandler Carruth6bda14b2017-06-06 11:49:48 +000023#include "WebAssembly.h"
Dan Gohman0cfb5f82016-05-10 04:24:02 +000024#include "WebAssemblyMachineFunctionInfo.h"
25#include "WebAssemblySubtarget.h"
Dan Gohman4fc4e422016-10-24 19:49:43 +000026#include "WebAssemblyUtilities.h"
Dan Gohman0cfb5f82016-05-10 04:24:02 +000027#include "llvm/CodeGen/MachineFunctionPass.h"
28#include "llvm/CodeGen/MachineInstrBuilder.h"
29#include "llvm/CodeGen/MachineRegisterInfo.h"
30#include "llvm/CodeGen/Passes.h"
31#include "llvm/Support/Debug.h"
32#include "llvm/Support/raw_ostream.h"
33using namespace llvm;
34
35#define DEBUG_TYPE "wasm-prepare-for-live-intervals"
36
37namespace {
38class WebAssemblyPrepareForLiveIntervals final : public MachineFunctionPass {
39public:
40 static char ID; // Pass identification, replacement for typeid
41 WebAssemblyPrepareForLiveIntervals() : MachineFunctionPass(ID) {}
42
43private:
Mehdi Amini117296c2016-10-01 02:56:57 +000044 StringRef getPassName() const override {
Dan Gohman0cfb5f82016-05-10 04:24:02 +000045 return "WebAssembly Prepare For LiveIntervals";
46 }
47
48 void getAnalysisUsage(AnalysisUsage &AU) const override {
49 AU.setPreservesCFG();
50 MachineFunctionPass::getAnalysisUsage(AU);
51 }
52
53 bool runOnMachineFunction(MachineFunction &MF) override;
54};
55} // end anonymous namespace
56
57char WebAssemblyPrepareForLiveIntervals::ID = 0;
Jacob Gravelle40926452018-03-30 20:36:58 +000058INITIALIZE_PASS(WebAssemblyPrepareForLiveIntervals, DEBUG_TYPE,
59 "Fix up code for LiveIntervals", false, false)
60
Dan Gohman0cfb5f82016-05-10 04:24:02 +000061FunctionPass *llvm::createWebAssemblyPrepareForLiveIntervals() {
62 return new WebAssemblyPrepareForLiveIntervals();
63}
64
Dan Gohman0cfb5f82016-05-10 04:24:02 +000065// Test whether the given register has an ARGUMENT def.
66static bool HasArgumentDef(unsigned Reg, const MachineRegisterInfo &MRI) {
Derek Schuff39bf39f2016-08-02 23:16:09 +000067 for (const auto &Def : MRI.def_instructions(Reg))
Dan Gohman4fc4e422016-10-24 19:49:43 +000068 if (WebAssembly::isArgument(Def))
Dan Gohman0cfb5f82016-05-10 04:24:02 +000069 return true;
70 return false;
71}
72
73bool WebAssemblyPrepareForLiveIntervals::runOnMachineFunction(MachineFunction &MF) {
74 DEBUG({
75 dbgs() << "********** Prepare For LiveIntervals **********\n"
76 << "********** Function: " << MF.getName() << '\n';
77 });
78
79 bool Changed = false;
80 MachineRegisterInfo &MRI = MF.getRegInfo();
81 const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
82 MachineBasicBlock &Entry = *MF.begin();
83
84 assert(!mustPreserveAnalysisID(LiveIntervalsID) &&
85 "LiveIntervals shouldn't be active yet!");
86
87 // We don't preserve SSA form.
88 MRI.leaveSSA();
89
90 // BranchFolding and perhaps other passes don't preserve IMPLICIT_DEF
91 // instructions. LiveIntervals requires that all paths to virtual register
92 // uses provide a definition. Insert IMPLICIT_DEFs in the entry block to
93 // conservatively satisfy this.
94 //
95 // TODO: This is fairly heavy-handed; find a better approach.
96 //
97 for (unsigned i = 0, e = MRI.getNumVirtRegs(); i < e; ++i) {
98 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
99
100 // Skip unused registers.
101 if (MRI.use_nodbg_empty(Reg))
102 continue;
103
104 // Skip registers that have an ARGUMENT definition.
105 if (HasArgumentDef(Reg, MRI))
106 continue;
107
108 BuildMI(Entry, Entry.begin(), DebugLoc(),
109 TII.get(WebAssembly::IMPLICIT_DEF), Reg);
110 Changed = true;
111 }
112
113 // Move ARGUMENT_* instructions to the top of the entry block, so that their
114 // liveness reflects the fact that these really are live-in values.
115 for (auto MII = Entry.begin(), MIE = Entry.end(); MII != MIE; ) {
Dan Gohman4fc4e422016-10-24 19:49:43 +0000116 MachineInstr &MI = *MII++;
117 if (WebAssembly::isArgument(MI)) {
118 MI.removeFromParent();
119 Entry.insert(Entry.begin(), &MI);
Dan Gohman0cfb5f82016-05-10 04:24:02 +0000120 }
121 }
122
Matthias Braunf8422972017-12-13 02:51:04 +0000123 // Ok, we're now ready to run the LiveIntervals analysis again.
Dan Gohman0cfb5f82016-05-10 04:24:02 +0000124 MF.getProperties().set(MachineFunctionProperties::Property::TracksLiveness);
125
126 return Changed;
127}