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gerrit-public.fairphone.software / toolchain / llvm-project / 64fa2f45135e24136a5e261f88cf6d7f182a3c89 / . / llvm / test / CodeGen / AMDGPU / global_atomics_i64.ll
blob: 3eabec4514509789917138cbba8a99d80ed62b8a [file] [log] [blame]
Matt Arsenault64fa2f42016-04-12 14:05:11 +0000[diff] [blame^]1; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
3
4
5; GCN-LABEL: {{^}}atomic_add_i64_offset:
6; GCN: buffer_atomic_add_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
7define void @atomic_add_i64_offset(i64 addrspace(1)* %out, i64 %in) {
8entry:
9 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
10 %tmp0 = atomicrmw volatile add i64 addrspace(1)* %gep, i64 %in seq_cst
11 ret void
12}
13
14; GCN-LABEL: {{^}}atomic_add_i64_ret_offset:
15; GCN: buffer_atomic_add_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
16; GCN: buffer_store_dwordx2 [[RET]]
17define void @atomic_add_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
18entry:
19 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
20 %tmp0 = atomicrmw volatile add i64 addrspace(1)* %gep, i64 %in seq_cst
21 store i64 %tmp0, i64 addrspace(1)* %out2
22 ret void
23}
24
25; GCN-LABEL: {{^}}atomic_add_i64_addr64_offset:
26; CI: buffer_atomic_add_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
27; VI: flat_atomic_add_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}}{{$}}
28define void @atomic_add_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
29entry:
30 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
31 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
32 %tmp0 = atomicrmw volatile add i64 addrspace(1)* %gep, i64 %in seq_cst
33 ret void
34}
35
36; GCN-LABEL: {{^}}atomic_add_i64_ret_addr64_offset:
37; CI: buffer_atomic_add_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
38; VI: flat_atomic_add_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
39; GCN: buffer_store_dwordx2 [[RET]]
40define void @atomic_add_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
41entry:
42 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
43 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
44 %tmp0 = atomicrmw volatile add i64 addrspace(1)* %gep, i64 %in seq_cst
45 store i64 %tmp0, i64 addrspace(1)* %out2
46 ret void
47}
48
49; GCN-LABEL: {{^}}atomic_add_i64:
50; GCN: buffer_atomic_add_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
51define void @atomic_add_i64(i64 addrspace(1)* %out, i64 %in) {
52entry:
53 %tmp0 = atomicrmw volatile add i64 addrspace(1)* %out, i64 %in seq_cst
54 ret void
55}
56
57; GCN-LABEL: {{^}}atomic_add_i64_ret:
58; GCN: buffer_atomic_add_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
59; GCN: buffer_store_dwordx2 [[RET]]
60define void @atomic_add_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
61entry:
62 %tmp0 = atomicrmw volatile add i64 addrspace(1)* %out, i64 %in seq_cst
63 store i64 %tmp0, i64 addrspace(1)* %out2
64 ret void
65}
66
67; GCN-LABEL: {{^}}atomic_add_i64_addr64:
68; CI: buffer_atomic_add_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
69; VI: flat_atomic_add_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
70define void @atomic_add_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
71entry:
72 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
73 %tmp0 = atomicrmw volatile add i64 addrspace(1)* %ptr, i64 %in seq_cst
74 ret void
75}
76
77; GCN-LABEL: {{^}}atomic_add_i64_ret_addr64:
78; CI: buffer_atomic_add_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
79; VI: flat_atomic_add_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
80; GCN: buffer_store_dwordx2 [[RET]]
81define void @atomic_add_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
82entry:
83 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
84 %tmp0 = atomicrmw volatile add i64 addrspace(1)* %ptr, i64 %in seq_cst
85 store i64 %tmp0, i64 addrspace(1)* %out2
86 ret void
87}
88
89; GCN-LABEL: {{^}}atomic_and_i64_offset:
90; GCN: buffer_atomic_and_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
91define void @atomic_and_i64_offset(i64 addrspace(1)* %out, i64 %in) {
92entry:
93 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
94 %tmp0 = atomicrmw volatile and i64 addrspace(1)* %gep, i64 %in seq_cst
95 ret void
96}
97
98; GCN-LABEL: {{^}}atomic_and_i64_ret_offset:
99; GCN: buffer_atomic_and_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
100; GCN: buffer_store_dwordx2 [[RET]]
101define void @atomic_and_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
102entry:
103 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
104 %tmp0 = atomicrmw volatile and i64 addrspace(1)* %gep, i64 %in seq_cst
105 store i64 %tmp0, i64 addrspace(1)* %out2
106 ret void
107}
108
109; GCN-LABEL: {{^}}atomic_and_i64_addr64_offset:
110; CI: buffer_atomic_and_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
111; VI: flat_atomic_and_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
112define void @atomic_and_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
113entry:
114 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
115 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
116 %tmp0 = atomicrmw volatile and i64 addrspace(1)* %gep, i64 %in seq_cst
117 ret void
118}
119
120; GCN-LABEL: {{^}}atomic_and_i64_ret_addr64_offset:
121; CI: buffer_atomic_and_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
122; VI: flat_atomic_and_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
123; GCN: buffer_store_dwordx2 [[RET]]
124define void @atomic_and_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
125entry:
126 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
127 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
128 %tmp0 = atomicrmw volatile and i64 addrspace(1)* %gep, i64 %in seq_cst
129 store i64 %tmp0, i64 addrspace(1)* %out2
130 ret void
131}
132
133; GCN-LABEL: {{^}}atomic_and_i64:
134; GCN: buffer_atomic_and_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
135define void @atomic_and_i64(i64 addrspace(1)* %out, i64 %in) {
136entry:
137 %tmp0 = atomicrmw volatile and i64 addrspace(1)* %out, i64 %in seq_cst
138 ret void
139}
140
141; GCN-LABEL: {{^}}atomic_and_i64_ret:
142; GCN: buffer_atomic_and_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
143; GCN: buffer_store_dwordx2 [[RET]]
144define void @atomic_and_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
145entry:
146 %tmp0 = atomicrmw volatile and i64 addrspace(1)* %out, i64 %in seq_cst
147 store i64 %tmp0, i64 addrspace(1)* %out2
148 ret void
149}
150
151; GCN-LABEL: {{^}}atomic_and_i64_addr64:
152; CI: buffer_atomic_and_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
153; VI: flat_atomic_and_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
154define void @atomic_and_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
155entry:
156 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
157 %tmp0 = atomicrmw volatile and i64 addrspace(1)* %ptr, i64 %in seq_cst
158 ret void
159}
160
161; GCN-LABEL: {{^}}atomic_and_i64_ret_addr64:
162; CI: buffer_atomic_and_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
163; VI: flat_atomic_and_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
164; GCN: buffer_store_dwordx2 [[RET]]
165define void @atomic_and_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
166entry:
167 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
168 %tmp0 = atomicrmw volatile and i64 addrspace(1)* %ptr, i64 %in seq_cst
169 store i64 %tmp0, i64 addrspace(1)* %out2
170 ret void
171}
172
173; GCN-LABEL: {{^}}atomic_sub_i64_offset:
174; GCN: buffer_atomic_sub_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
175define void @atomic_sub_i64_offset(i64 addrspace(1)* %out, i64 %in) {
176entry:
177 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
178 %tmp0 = atomicrmw volatile sub i64 addrspace(1)* %gep, i64 %in seq_cst
179 ret void
180}
181
182; GCN-LABEL: {{^}}atomic_sub_i64_ret_offset:
183; GCN: buffer_atomic_sub_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
184; GCN: buffer_store_dwordx2 [[RET]]
185define void @atomic_sub_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
186entry:
187 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
188 %tmp0 = atomicrmw volatile sub i64 addrspace(1)* %gep, i64 %in seq_cst
189 store i64 %tmp0, i64 addrspace(1)* %out2
190 ret void
191}
192
193; GCN-LABEL: {{^}}atomic_sub_i64_addr64_offset:
194; CI: buffer_atomic_sub_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
195; VI: flat_atomic_sub_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
196define void @atomic_sub_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
197entry:
198 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
199 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
200 %tmp0 = atomicrmw volatile sub i64 addrspace(1)* %gep, i64 %in seq_cst
201 ret void
202}
203
204; GCN-LABEL: {{^}}atomic_sub_i64_ret_addr64_offset:
205; CI: buffer_atomic_sub_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
206; VI: flat_atomic_sub_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
207; GCN: buffer_store_dwordx2 [[RET]]
208define void @atomic_sub_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
209entry:
210 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
211 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
212 %tmp0 = atomicrmw volatile sub i64 addrspace(1)* %gep, i64 %in seq_cst
213 store i64 %tmp0, i64 addrspace(1)* %out2
214 ret void
215}
216
217; GCN-LABEL: {{^}}atomic_sub_i64:
218; GCN: buffer_atomic_sub_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
219define void @atomic_sub_i64(i64 addrspace(1)* %out, i64 %in) {
220entry:
221 %tmp0 = atomicrmw volatile sub i64 addrspace(1)* %out, i64 %in seq_cst
222 ret void
223}
224
225; GCN-LABEL: {{^}}atomic_sub_i64_ret:
226; GCN: buffer_atomic_sub_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
227; GCN: buffer_store_dwordx2 [[RET]]
228define void @atomic_sub_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
229entry:
230 %tmp0 = atomicrmw volatile sub i64 addrspace(1)* %out, i64 %in seq_cst
231 store i64 %tmp0, i64 addrspace(1)* %out2
232 ret void
233}
234
235; GCN-LABEL: {{^}}atomic_sub_i64_addr64:
236; CI: buffer_atomic_sub_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
237; VI: flat_atomic_sub_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
238define void @atomic_sub_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
239entry:
240 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
241 %tmp0 = atomicrmw volatile sub i64 addrspace(1)* %ptr, i64 %in seq_cst
242 ret void
243}
244
245; GCN-LABEL: {{^}}atomic_sub_i64_ret_addr64:
246; CI: buffer_atomic_sub_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
247; VI: flat_atomic_sub_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
248; GCN: buffer_store_dwordx2 [[RET]]
249define void @atomic_sub_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
250entry:
251 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
252 %tmp0 = atomicrmw volatile sub i64 addrspace(1)* %ptr, i64 %in seq_cst
253 store i64 %tmp0, i64 addrspace(1)* %out2
254 ret void
255}
256
257; GCN-LABEL: {{^}}atomic_max_i64_offset:
258; GCN: buffer_atomic_smax_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
259define void @atomic_max_i64_offset(i64 addrspace(1)* %out, i64 %in) {
260entry:
261 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
262 %tmp0 = atomicrmw volatile max i64 addrspace(1)* %gep, i64 %in seq_cst
263 ret void
264}
265
266; GCN-LABEL: {{^}}atomic_max_i64_ret_offset:
267; GCN: buffer_atomic_smax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
268; GCN: buffer_store_dwordx2 [[RET]]
269define void @atomic_max_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
270entry:
271 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
272 %tmp0 = atomicrmw volatile max i64 addrspace(1)* %gep, i64 %in seq_cst
273 store i64 %tmp0, i64 addrspace(1)* %out2
274 ret void
275}
276
277; GCN-LABEL: {{^}}atomic_max_i64_addr64_offset:
278; CI: buffer_atomic_smax_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
279; VI: flat_atomic_smax_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
280define void @atomic_max_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
281entry:
282 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
283 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
284 %tmp0 = atomicrmw volatile max i64 addrspace(1)* %gep, i64 %in seq_cst
285 ret void
286}
287
288; GCN-LABEL: {{^}}atomic_max_i64_ret_addr64_offset:
289; CI: buffer_atomic_smax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
290; VI: flat_atomic_smax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
291; GCN: buffer_store_dwordx2 [[RET]]
292define void @atomic_max_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
293entry:
294 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
295 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
296 %tmp0 = atomicrmw volatile max i64 addrspace(1)* %gep, i64 %in seq_cst
297 store i64 %tmp0, i64 addrspace(1)* %out2
298 ret void
299}
300
301; GCN-LABEL: {{^}}atomic_max_i64:
302; GCN: buffer_atomic_smax_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
303define void @atomic_max_i64(i64 addrspace(1)* %out, i64 %in) {
304entry:
305 %tmp0 = atomicrmw volatile max i64 addrspace(1)* %out, i64 %in seq_cst
306 ret void
307}
308
309; GCN-LABEL: {{^}}atomic_max_i64_ret:
310; GCN: buffer_atomic_smax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
311; GCN: buffer_store_dwordx2 [[RET]]
312define void @atomic_max_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
313entry:
314 %tmp0 = atomicrmw volatile max i64 addrspace(1)* %out, i64 %in seq_cst
315 store i64 %tmp0, i64 addrspace(1)* %out2
316 ret void
317}
318
319; GCN-LABEL: {{^}}atomic_max_i64_addr64:
320; CI: buffer_atomic_smax_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
321; VI: flat_atomic_smax_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
322define void @atomic_max_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
323entry:
324 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
325 %tmp0 = atomicrmw volatile max i64 addrspace(1)* %ptr, i64 %in seq_cst
326 ret void
327}
328
329; GCN-LABEL: {{^}}atomic_max_i64_ret_addr64:
330; CI: buffer_atomic_smax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
331; VI: flat_atomic_smax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
332; GCN: buffer_store_dwordx2 [[RET]]
333define void @atomic_max_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
334entry:
335 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
336 %tmp0 = atomicrmw volatile max i64 addrspace(1)* %ptr, i64 %in seq_cst
337 store i64 %tmp0, i64 addrspace(1)* %out2
338 ret void
339}
340
341; GCN-LABEL: {{^}}atomic_umax_i64_offset:
342; GCN: buffer_atomic_umax_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
343define void @atomic_umax_i64_offset(i64 addrspace(1)* %out, i64 %in) {
344entry:
345 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
346 %tmp0 = atomicrmw volatile umax i64 addrspace(1)* %gep, i64 %in seq_cst
347 ret void
348}
349
350; GCN-LABEL: {{^}}atomic_umax_i64_ret_offset:
351; GCN: buffer_atomic_umax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
352; GCN: buffer_store_dwordx2 [[RET]]
353define void @atomic_umax_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
354entry:
355 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
356 %tmp0 = atomicrmw volatile umax i64 addrspace(1)* %gep, i64 %in seq_cst
357 store i64 %tmp0, i64 addrspace(1)* %out2
358 ret void
359}
360
361; GCN-LABEL: {{^}}atomic_umax_i64_addr64_offset:
362; CI: buffer_atomic_umax_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
363; VI: flat_atomic_umax_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
364define void @atomic_umax_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
365entry:
366 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
367 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
368 %tmp0 = atomicrmw volatile umax i64 addrspace(1)* %gep, i64 %in seq_cst
369 ret void
370}
371
372; GCN-LABEL: {{^}}atomic_umax_i64_ret_addr64_offset:
373; CI: buffer_atomic_umax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
374; VI: flat_atomic_umax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
375; GCN: buffer_store_dwordx2 [[RET]]
376define void @atomic_umax_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
377entry:
378 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
379 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
380 %tmp0 = atomicrmw volatile umax i64 addrspace(1)* %gep, i64 %in seq_cst
381 store i64 %tmp0, i64 addrspace(1)* %out2
382 ret void
383}
384
385; GCN-LABEL: {{^}}atomic_umax_i64:
386; GCN: buffer_atomic_umax_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
387define void @atomic_umax_i64(i64 addrspace(1)* %out, i64 %in) {
388entry:
389 %tmp0 = atomicrmw volatile umax i64 addrspace(1)* %out, i64 %in seq_cst
390 ret void
391}
392
393; GCN-LABEL: {{^}}atomic_umax_i64_ret:
394; GCN: buffer_atomic_umax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
395; GCN: buffer_store_dwordx2 [[RET]]
396define void @atomic_umax_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
397entry:
398 %tmp0 = atomicrmw volatile umax i64 addrspace(1)* %out, i64 %in seq_cst
399 store i64 %tmp0, i64 addrspace(1)* %out2
400 ret void
401}
402
403; GCN-LABEL: {{^}}atomic_umax_i64_addr64:
404; CI: buffer_atomic_umax_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
405; VI: flat_atomic_umax_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
406define void @atomic_umax_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
407entry:
408 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
409 %tmp0 = atomicrmw volatile umax i64 addrspace(1)* %ptr, i64 %in seq_cst
410 ret void
411}
412
413; GCN-LABEL: {{^}}atomic_umax_i64_ret_addr64:
414; CI: buffer_atomic_umax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
415; VI: flat_atomic_umax_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
416; GCN: buffer_store_dwordx2 [[RET]]
417define void @atomic_umax_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
418entry:
419 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
420 %tmp0 = atomicrmw volatile umax i64 addrspace(1)* %ptr, i64 %in seq_cst
421 store i64 %tmp0, i64 addrspace(1)* %out2
422 ret void
423}
424
425; GCN-LABEL: {{^}}atomic_min_i64_offset:
426; GCN: buffer_atomic_smin_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
427define void @atomic_min_i64_offset(i64 addrspace(1)* %out, i64 %in) {
428entry:
429 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
430 %tmp0 = atomicrmw volatile min i64 addrspace(1)* %gep, i64 %in seq_cst
431 ret void
432}
433
434; GCN-LABEL: {{^}}atomic_min_i64_ret_offset:
435; GCN: buffer_atomic_smin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
436; GCN: buffer_store_dwordx2 [[RET]]
437define void @atomic_min_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
438entry:
439 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
440 %tmp0 = atomicrmw volatile min i64 addrspace(1)* %gep, i64 %in seq_cst
441 store i64 %tmp0, i64 addrspace(1)* %out2
442 ret void
443}
444
445; GCN-LABEL: {{^}}atomic_min_i64_addr64_offset:
446; CI: buffer_atomic_smin_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
447; VI: flat_atomic_smin_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
448define void @atomic_min_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
449entry:
450 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
451 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
452 %tmp0 = atomicrmw volatile min i64 addrspace(1)* %gep, i64 %in seq_cst
453 ret void
454}
455
456; GCN-LABEL: {{^}}atomic_min_i64_ret_addr64_offset:
457; CI: buffer_atomic_smin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
458; VI: flat_atomic_smin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
459; GCN: buffer_store_dwordx2 [[RET]]
460define void @atomic_min_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
461entry:
462 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
463 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
464 %tmp0 = atomicrmw volatile min i64 addrspace(1)* %gep, i64 %in seq_cst
465 store i64 %tmp0, i64 addrspace(1)* %out2
466 ret void
467}
468
469; GCN-LABEL: {{^}}atomic_min_i64:
470; GCN: buffer_atomic_smin_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
471define void @atomic_min_i64(i64 addrspace(1)* %out, i64 %in) {
472entry:
473 %tmp0 = atomicrmw volatile min i64 addrspace(1)* %out, i64 %in seq_cst
474 ret void
475}
476
477; GCN-LABEL: {{^}}atomic_min_i64_ret:
478; GCN: buffer_atomic_smin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
479; GCN: buffer_store_dwordx2 [[RET]]
480define void @atomic_min_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
481entry:
482 %tmp0 = atomicrmw volatile min i64 addrspace(1)* %out, i64 %in seq_cst
483 store i64 %tmp0, i64 addrspace(1)* %out2
484 ret void
485}
486
487; GCN-LABEL: {{^}}atomic_min_i64_addr64:
488; CI: buffer_atomic_smin_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
489; VI: flat_atomic_smin_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
490define void @atomic_min_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
491entry:
492 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
493 %tmp0 = atomicrmw volatile min i64 addrspace(1)* %ptr, i64 %in seq_cst
494 ret void
495}
496
497; GCN-LABEL: {{^}}atomic_min_i64_ret_addr64:
498; CI: buffer_atomic_smin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
499; VI: flat_atomic_smin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
500; GCN: buffer_store_dwordx2 [[RET]]
501define void @atomic_min_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
502entry:
503 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
504 %tmp0 = atomicrmw volatile min i64 addrspace(1)* %ptr, i64 %in seq_cst
505 store i64 %tmp0, i64 addrspace(1)* %out2
506 ret void
507}
508
509; GCN-LABEL: {{^}}atomic_umin_i64_offset:
510; GCN: buffer_atomic_umin_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
511define void @atomic_umin_i64_offset(i64 addrspace(1)* %out, i64 %in) {
512entry:
513 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
514 %tmp0 = atomicrmw volatile umin i64 addrspace(1)* %gep, i64 %in seq_cst
515 ret void
516}
517
518; GCN-LABEL: {{^}}atomic_umin_i64_ret_offset:
519; GCN: buffer_atomic_umin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
520; GCN: buffer_store_dwordx2 [[RET]]
521define void @atomic_umin_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
522entry:
523 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
524 %tmp0 = atomicrmw volatile umin i64 addrspace(1)* %gep, i64 %in seq_cst
525 store i64 %tmp0, i64 addrspace(1)* %out2
526 ret void
527}
528
529; GCN-LABEL: {{^}}atomic_umin_i64_addr64_offset:
530; CI: buffer_atomic_umin_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
531; VI: flat_atomic_umin_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
532define void @atomic_umin_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
533entry:
534 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
535 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
536 %tmp0 = atomicrmw volatile umin i64 addrspace(1)* %gep, i64 %in seq_cst
537 ret void
538}
539
540; GCN-LABEL: {{^}}atomic_umin_i64_ret_addr64_offset:
541; CI: buffer_atomic_umin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
542; VI: flat_atomic_umin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
543; GCN: buffer_store_dwordx2 [[RET]]
544define void @atomic_umin_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
545entry:
546 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
547 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
548 %tmp0 = atomicrmw volatile umin i64 addrspace(1)* %gep, i64 %in seq_cst
549 store i64 %tmp0, i64 addrspace(1)* %out2
550 ret void
551}
552
553; GCN-LABEL: {{^}}atomic_umin_i64:
554; GCN: buffer_atomic_umin_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
555define void @atomic_umin_i64(i64 addrspace(1)* %out, i64 %in) {
556entry:
557 %tmp0 = atomicrmw volatile umin i64 addrspace(1)* %out, i64 %in seq_cst
558 ret void
559}
560
561; GCN-LABEL: {{^}}atomic_umin_i64_ret:
562; CI: buffer_atomic_umin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
563; GCN: buffer_store_dwordx2 [[RET]]
564define void @atomic_umin_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
565entry:
566 %tmp0 = atomicrmw volatile umin i64 addrspace(1)* %out, i64 %in seq_cst
567 store i64 %tmp0, i64 addrspace(1)* %out2
568 ret void
569}
570
571; GCN-LABEL: {{^}}atomic_umin_i64_addr64:
572; CI: buffer_atomic_umin_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
573; VI: flat_atomic_umin_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
574define void @atomic_umin_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
575entry:
576 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
577 %tmp0 = atomicrmw volatile umin i64 addrspace(1)* %ptr, i64 %in seq_cst
578 ret void
579}
580
581; GCN-LABEL: {{^}}atomic_umin_i64_ret_addr64:
582; CI: buffer_atomic_umin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
583; VI: flat_atomic_umin_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
584; GCN: buffer_store_dwordx2 [[RET]]
585define void @atomic_umin_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
586entry:
587 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
588 %tmp0 = atomicrmw volatile umin i64 addrspace(1)* %ptr, i64 %in seq_cst
589 store i64 %tmp0, i64 addrspace(1)* %out2
590 ret void
591}
592
593; GCN-LABEL: {{^}}atomic_or_i64_offset:
594; GCN: buffer_atomic_or_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
595define void @atomic_or_i64_offset(i64 addrspace(1)* %out, i64 %in) {
596entry:
597 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
598 %tmp0 = atomicrmw volatile or i64 addrspace(1)* %gep, i64 %in seq_cst
599 ret void
600}
601
602; GCN-LABEL: {{^}}atomic_or_i64_ret_offset:
603; GCN: buffer_atomic_or_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
604; GCN: buffer_store_dwordx2 [[RET]]
605define void @atomic_or_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
606entry:
607 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
608 %tmp0 = atomicrmw volatile or i64 addrspace(1)* %gep, i64 %in seq_cst
609 store i64 %tmp0, i64 addrspace(1)* %out2
610 ret void
611}
612
613; GCN-LABEL: {{^}}atomic_or_i64_addr64_offset:
614; CI: buffer_atomic_or_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
615; VI: flat_atomic_or_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
616define void @atomic_or_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
617entry:
618 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
619 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
620 %tmp0 = atomicrmw volatile or i64 addrspace(1)* %gep, i64 %in seq_cst
621 ret void
622}
623
624; GCN-LABEL: {{^}}atomic_or_i64_ret_addr64_offset:
625; CI: buffer_atomic_or_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
626; VI: flat_atomic_or_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
627; GCN: buffer_store_dwordx2 [[RET]]
628define void @atomic_or_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
629entry:
630 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
631 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
632 %tmp0 = atomicrmw volatile or i64 addrspace(1)* %gep, i64 %in seq_cst
633 store i64 %tmp0, i64 addrspace(1)* %out2
634 ret void
635}
636
637; GCN-LABEL: {{^}}atomic_or_i64:
638; GCN: buffer_atomic_or_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
639define void @atomic_or_i64(i64 addrspace(1)* %out, i64 %in) {
640entry:
641 %tmp0 = atomicrmw volatile or i64 addrspace(1)* %out, i64 %in seq_cst
642 ret void
643}
644
645; GCN-LABEL: {{^}}atomic_or_i64_ret:
646; GCN: buffer_atomic_or_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
647; GCN: buffer_store_dwordx2 [[RET]]
648define void @atomic_or_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
649entry:
650 %tmp0 = atomicrmw volatile or i64 addrspace(1)* %out, i64 %in seq_cst
651 store i64 %tmp0, i64 addrspace(1)* %out2
652 ret void
653}
654
655; GCN-LABEL: {{^}}atomic_or_i64_addr64:
656; CI: buffer_atomic_or_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
657; VI: flat_atomic_or_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
658define void @atomic_or_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
659entry:
660 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
661 %tmp0 = atomicrmw volatile or i64 addrspace(1)* %ptr, i64 %in seq_cst
662 ret void
663}
664
665; GCN-LABEL: {{^}}atomic_or_i64_ret_addr64:
666; CI: buffer_atomic_or_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
667; VI: flat_atomic_or_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
668; GCN: buffer_store_dwordx2 [[RET]]
669define void @atomic_or_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
670entry:
671 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
672 %tmp0 = atomicrmw volatile or i64 addrspace(1)* %ptr, i64 %in seq_cst
673 store i64 %tmp0, i64 addrspace(1)* %out2
674 ret void
675}
676
677; GCN-LABEL: {{^}}atomic_xchg_i64_offset:
678; GCN: buffer_atomic_swap_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
679define void @atomic_xchg_i64_offset(i64 addrspace(1)* %out, i64 %in) {
680entry:
681 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
682 %tmp0 = atomicrmw volatile xchg i64 addrspace(1)* %gep, i64 %in seq_cst
683 ret void
684}
685
686; GCN-LABEL: {{^}}atomic_xchg_i64_ret_offset:
687; GCN: buffer_atomic_swap_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
688; GCN: buffer_store_dwordx2 [[RET]]
689define void @atomic_xchg_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
690entry:
691 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
692 %tmp0 = atomicrmw volatile xchg i64 addrspace(1)* %gep, i64 %in seq_cst
693 store i64 %tmp0, i64 addrspace(1)* %out2
694 ret void
695}
696
697; GCN-LABEL: {{^}}atomic_xchg_i64_addr64_offset:
698; CI: buffer_atomic_swap_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
699define void @atomic_xchg_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
700entry:
701 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
702 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
703 %tmp0 = atomicrmw volatile xchg i64 addrspace(1)* %gep, i64 %in seq_cst
704 ret void
705}
706
707; GCN-LABEL: {{^}}atomic_xchg_i64_ret_addr64_offset:
708; CI: buffer_atomic_swap_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
709; VI: flat_atomic_swap_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
710; GCN: buffer_store_dwordx2 [[RET]]
711define void @atomic_xchg_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
712entry:
713 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
714 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
715 %tmp0 = atomicrmw volatile xchg i64 addrspace(1)* %gep, i64 %in seq_cst
716 store i64 %tmp0, i64 addrspace(1)* %out2
717 ret void
718}
719
720; GCN-LABEL: {{^}}atomic_xchg_i64:
721; GCN: buffer_atomic_swap_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
722define void @atomic_xchg_i64(i64 addrspace(1)* %out, i64 %in) {
723entry:
724 %tmp0 = atomicrmw volatile xchg i64 addrspace(1)* %out, i64 %in seq_cst
725 ret void
726}
727
728; GCN-LABEL: {{^}}atomic_xchg_i64_ret:
729; GCN: buffer_atomic_swap_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
730; GCN: buffer_store_dwordx2 [[RET]]
731define void @atomic_xchg_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
732entry:
733 %tmp0 = atomicrmw volatile xchg i64 addrspace(1)* %out, i64 %in seq_cst
734 store i64 %tmp0, i64 addrspace(1)* %out2
735 ret void
736}
737
738; GCN-LABEL: {{^}}atomic_xchg_i64_addr64:
739; CI: buffer_atomic_swap_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
740; VI: flat_atomic_swap_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
741define void @atomic_xchg_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
742entry:
743 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
744 %tmp0 = atomicrmw volatile xchg i64 addrspace(1)* %ptr, i64 %in seq_cst
745 ret void
746}
747
748; GCN-LABEL: {{^}}atomic_xchg_i64_ret_addr64:
749; CI: buffer_atomic_swap_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
750; VI: flat_atomic_swap_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
751; GCN: buffer_store_dwordx2 [[RET]]
752define void @atomic_xchg_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
753entry:
754 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
755 %tmp0 = atomicrmw volatile xchg i64 addrspace(1)* %ptr, i64 %in seq_cst
756 store i64 %tmp0, i64 addrspace(1)* %out2
757 ret void
758}
759
760; GCN-LABEL: {{^}}atomic_xor_i64_offset:
761; GCN: buffer_atomic_xor_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}}
762define void @atomic_xor_i64_offset(i64 addrspace(1)* %out, i64 %in) {
763entry:
764 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
765 %tmp0 = atomicrmw volatile xor i64 addrspace(1)* %gep, i64 %in seq_cst
766 ret void
767}
768
769; GCN-LABEL: {{^}}atomic_xor_i64_ret_offset:
770; GCN: buffer_atomic_xor_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 glc{{$}}
771; GCN: buffer_store_dwordx2 [[RET]]
772define void @atomic_xor_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
773entry:
774 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4
775 %tmp0 = atomicrmw volatile xor i64 addrspace(1)* %gep, i64 %in seq_cst
776 store i64 %tmp0, i64 addrspace(1)* %out2
777 ret void
778}
779
780; GCN-LABEL: {{^}}atomic_xor_i64_addr64_offset:
781; CI: buffer_atomic_xor_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32{{$}}
782; VI: flat_atomic_xor_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
783define void @atomic_xor_i64_addr64_offset(i64 addrspace(1)* %out, i64 %in, i64 %index) {
784entry:
785 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
786 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
787 %tmp0 = atomicrmw volatile xor i64 addrspace(1)* %gep, i64 %in seq_cst
788 ret void
789}
790
791; GCN-LABEL: {{^}}atomic_xor_i64_ret_addr64_offset:
792; CI: buffer_atomic_xor_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:32 glc{{$}}
793; VI: flat_atomic_xor_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
794; GCN: buffer_store_dwordx2 [[RET]]
795define void @atomic_xor_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
796entry:
797 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
798 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i64 4
799 %tmp0 = atomicrmw volatile xor i64 addrspace(1)* %gep, i64 %in seq_cst
800 store i64 %tmp0, i64 addrspace(1)* %out2
801 ret void
802}
803
804; GCN-LABEL: {{^}}atomic_xor_i64:
805; GCN: buffer_atomic_xor_x2 v{{\[[0-9]+:[0-9]+\]}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
806define void @atomic_xor_i64(i64 addrspace(1)* %out, i64 %in) {
807entry:
808 %tmp0 = atomicrmw volatile xor i64 addrspace(1)* %out, i64 %in seq_cst
809 ret void
810}
811
812; GCN-LABEL: {{^}}atomic_xor_i64_ret:
813; GCN: buffer_atomic_xor_x2 [[RET:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
814; GCN: buffer_store_dwordx2 [[RET]]
815define void @atomic_xor_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
816entry:
817 %tmp0 = atomicrmw volatile xor i64 addrspace(1)* %out, i64 %in seq_cst
818 store i64 %tmp0, i64 addrspace(1)* %out2
819 ret void
820}
821
822; GCN-LABEL: {{^}}atomic_xor_i64_addr64:
823; CI: buffer_atomic_xor_x2 v{{\[[0-9]+:[0-9]+\]}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
824; VI: flat_atomic_xor_x2 v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]$}}
825define void @atomic_xor_i64_addr64(i64 addrspace(1)* %out, i64 %in, i64 %index) {
826entry:
827 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
828 %tmp0 = atomicrmw volatile xor i64 addrspace(1)* %ptr, i64 %in seq_cst
829 ret void
830}
831
832; GCN-LABEL: {{^}}atomic_xor_i64_ret_addr64:
833; CI: buffer_atomic_xor_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
834; VI: flat_atomic_xor_x2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}], v{{\[[0-9]+:[0-9]+\]}} glc{{$}}
835; GCN: buffer_store_dwordx2 [[RET]]
836define void @atomic_xor_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %index) {
837entry:
838 %ptr = getelementptr i64, i64 addrspace(1)* %out, i64 %index
839 %tmp0 = atomicrmw volatile xor i64 addrspace(1)* %ptr, i64 %in seq_cst
840 store i64 %tmp0, i64 addrspace(1)* %out2
841 ret void
842}