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Andrea Di Biagio0cc66c72018-03-09 13:52:03 +00001//===--------------------- SummaryView.cpp -------------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10///
11/// This file implements the functionalities used by the SummaryView to print
12/// the report information.
13///
14//===----------------------------------------------------------------------===//
15
Matt Davis10aa09f2018-08-24 20:24:53 +000016#include "Views/SummaryView.h"
Andrea Di Biagio3fc20c92018-05-23 15:59:27 +000017#include "Support.h"
18#include "llvm/ADT/SmallVector.h"
Andrea Di Biagiodf5d9482018-03-23 19:40:04 +000019#include "llvm/Support/Format.h"
Andrea Di Biagio0cc66c72018-03-09 13:52:03 +000020
21namespace mca {
22
Andrea Di Biagiodf5d9482018-03-23 19:40:04 +000023#define DEBUG_TYPE "llvm-mca"
24
Andrea Di Biagio0cc66c72018-03-09 13:52:03 +000025using namespace llvm;
26
Andrea Di Biagiodb158be2018-10-22 16:28:07 +000027SummaryView::SummaryView(const MCSchedModel &Model, const SourceMgr &S,
Andrea Di Biagiobdc67062018-06-01 14:35:21 +000028 unsigned Width)
29 : SM(Model), Source(S), DispatchWidth(Width), TotalCycles(0),
Andrea Di Biagio65c77d72018-10-24 16:56:43 +000030 NumMicroOps(0), ProcResourceUsage(Model.getNumProcResourceKinds(), 0) {
Andrea Di Biagiobdc67062018-06-01 14:35:21 +000031 computeProcResourceMasks(SM, ProcResourceMasks);
32}
33
Matt Davis0906a7f2018-07-12 16:56:17 +000034void SummaryView::onEvent(const HWInstructionEvent &Event) {
Andrea Di Biagio8b647dc2018-08-30 10:50:20 +000035 // We are only interested in the "instruction retired" events generated by
36 // the retire stage for instructions that are part of iteration #0.
37 if (Event.Type != HWInstructionEvent::Retired ||
38 Event.IR.getSourceIndex() >= Source.size())
Andrea Di Biagio3fc20c92018-05-23 15:59:27 +000039 return;
40
41 // Update the cumulative number of resource cycles based on the processor
Andrea Di Biagio0af81152018-05-24 17:22:14 +000042 // resource usage information available from the instruction descriptor. We
43 // need to compute the cumulative number of resource cycles for every
44 // processor resource which is consumed by an instruction of the block.
Andrea Di Biagio3fc20c92018-05-23 15:59:27 +000045 const Instruction &Inst = *Event.IR.getInstruction();
46 const InstrDesc &Desc = Inst.getDesc();
47 NumMicroOps += Desc.NumMicroOps;
48 for (const std::pair<uint64_t, const ResourceUsage> &RU : Desc.Resources) {
Andrea Di Biagiobdc67062018-06-01 14:35:21 +000049 if (RU.second.size()) {
50 const auto It = find(ProcResourceMasks, RU.first);
51 assert(It != ProcResourceMasks.end() &&
52 "Invalid processor resource mask!");
53 ProcResourceUsage[std::distance(ProcResourceMasks.begin(), It)] +=
54 RU.second.size();
Andrea Di Biagio3fc20c92018-05-23 15:59:27 +000055 }
56 }
Andrea Di Biagio3fc20c92018-05-23 15:59:27 +000057}
58
Andrea Di Biagiodf5d9482018-03-23 19:40:04 +000059void SummaryView::printView(raw_ostream &OS) const {
Andrea Di Biagiob5229752018-03-13 17:24:32 +000060 unsigned Iterations = Source.getNumIterations();
61 unsigned Instructions = Source.size();
Andrea Di Biagio0cc66c72018-03-09 13:52:03 +000062 unsigned TotalInstructions = Instructions * Iterations;
Andrea Di Biagioa2eee472018-08-29 17:56:39 +000063 unsigned TotalUOps = NumMicroOps * Iterations;
Andrea Di Biagio0cc66c72018-03-09 13:52:03 +000064 double IPC = (double)TotalInstructions / TotalCycles;
Andrea Di Biagioa2eee472018-08-29 17:56:39 +000065 double UOpsPerCycle = (double)TotalUOps / TotalCycles;
Andrea Di Biagiobdc67062018-06-01 14:35:21 +000066 double BlockRThroughput = computeBlockRThroughput(
67 SM, DispatchWidth, NumMicroOps, ProcResourceUsage);
Andrea Di Biagio0cc66c72018-03-09 13:52:03 +000068
69 std::string Buffer;
70 raw_string_ostream TempStream(Buffer);
Andrea Di Biagio3fc20c92018-05-23 15:59:27 +000071 TempStream << "Iterations: " << Iterations;
72 TempStream << "\nInstructions: " << TotalInstructions;
73 TempStream << "\nTotal Cycles: " << TotalCycles;
Andrea Di Biagioa2eee472018-08-29 17:56:39 +000074 TempStream << "\nTotal uOps: " << TotalUOps << '\n';
Andrea Di Biagio3fc20c92018-05-23 15:59:27 +000075 TempStream << "\nDispatch Width: " << DispatchWidth;
Andrea Di Biagioa2eee472018-08-29 17:56:39 +000076 TempStream << "\nuOps Per Cycle: "
77 << format("%.2f", floor((UOpsPerCycle * 100) + 0.5) / 100);
78 TempStream << "\nIPC: "
79 << format("%.2f", floor((IPC * 100) + 0.5) / 100);
Andrea Di Biagio0af81152018-05-24 17:22:14 +000080 TempStream << "\nBlock RThroughput: "
81 << format("%.1f", floor((BlockRThroughput * 10) + 0.5) / 10)
Andrea Di Biagio3fc20c92018-05-23 15:59:27 +000082 << '\n';
Andrea Di Biagio0cc66c72018-03-09 13:52:03 +000083 TempStream.flush();
84 OS << Buffer;
85}
Andrea Di Biagio0cc66c72018-03-09 13:52:03 +000086} // namespace mca.