blob: b30968a959c30f2bd1224ed11529ead0040507d6 [file] [log] [blame]
Alex Bradburyffc435e2017-11-21 08:11:03 +00001; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN: | FileCheck %s -check-prefix=RV32I
4
5define i32 @urem(i32 %a, i32 %b) nounwind {
6; RV32I-LABEL: urem:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +00007; RV32I: # %bb.0:
Alex Bradbury660bcce2017-12-11 11:53:54 +00008; RV32I-NEXT: sw ra, 12(sp)
Alex Bradburyffc435e2017-11-21 08:11:03 +00009; RV32I-NEXT: lui a2, %hi(__umodsi3)
10; RV32I-NEXT: addi a2, a2, %lo(__umodsi3)
11; RV32I-NEXT: jalr ra, a2, 0
Alex Bradbury660bcce2017-12-11 11:53:54 +000012; RV32I-NEXT: lw ra, 12(sp)
Alex Bradburyffc435e2017-11-21 08:11:03 +000013; RV32I-NEXT: jalr zero, ra, 0
14 %1 = urem i32 %a, %b
15 ret i32 %1
16}
17
18define i32 @srem(i32 %a, i32 %b) nounwind {
19; RV32I-LABEL: srem:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +000020; RV32I: # %bb.0:
Alex Bradbury660bcce2017-12-11 11:53:54 +000021; RV32I-NEXT: sw ra, 12(sp)
Alex Bradburyffc435e2017-11-21 08:11:03 +000022; RV32I-NEXT: lui a2, %hi(__modsi3)
23; RV32I-NEXT: addi a2, a2, %lo(__modsi3)
24; RV32I-NEXT: jalr ra, a2, 0
Alex Bradbury660bcce2017-12-11 11:53:54 +000025; RV32I-NEXT: lw ra, 12(sp)
Alex Bradburyffc435e2017-11-21 08:11:03 +000026; RV32I-NEXT: jalr zero, ra, 0
27 %1 = srem i32 %a, %b
28 ret i32 %1
29}