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Jia Liub22310f2012-02-18 12:03:15 +00001//===-- HexagonAsmPrinter.cpp - Print machine instrs to Hexagon assembly --===//
Tony Linthicum1213a7a2011-12-12 21:14:40 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a printer that converts from our internal representation
11// of machine-dependent LLVM code to Hexagon assembly language. This printer is
12// the output mechanism used by `llc'.
13//
Tony Linthicum1213a7a2011-12-12 21:14:40 +000014//===----------------------------------------------------------------------===//
15
Chandler Carruthed0881b2012-12-03 16:50:05 +000016#include "Hexagon.h"
Jyotsna Verma7503a622013-02-20 16:13:27 +000017#include "HexagonAsmPrinter.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000018#include "HexagonMachineFunctionInfo.h"
Jyotsna Verma7503a622013-02-20 16:13:27 +000019#include "HexagonSubtarget.h"
Chandler Carruth8a8cd2b2014-01-07 11:48:04 +000020#include "HexagonTargetMachine.h"
Colin LeMahieuff062612014-11-20 21:56:35 +000021#include "MCTargetDesc/HexagonInstPrinter.h"
Chandler Carruth8a8cd2b2014-01-07 11:48:04 +000022#include "MCTargetDesc/HexagonMCInst.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000023#include "llvm/ADT/SmallString.h"
24#include "llvm/ADT/SmallVector.h"
25#include "llvm/ADT/StringExtras.h"
Evandro Menezes5cee6212012-04-12 17:55:53 +000026#include "llvm/Analysis/ConstantFolding.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000027#include "llvm/CodeGen/AsmPrinter.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000028#include "llvm/CodeGen/MachineFunctionPass.h"
29#include "llvm/CodeGen/MachineInstr.h"
30#include "llvm/CodeGen/MachineInstrBuilder.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000031#include "llvm/CodeGen/MachineModuleInfo.h"
Chandler Carruth9fb823b2013-01-02 11:36:10 +000032#include "llvm/IR/Constants.h"
33#include "llvm/IR/DataLayout.h"
34#include "llvm/IR/DerivedTypes.h"
Rafael Espindola894843c2014-01-07 21:19:40 +000035#include "llvm/IR/Mangler.h"
Chandler Carruth9fb823b2013-01-02 11:36:10 +000036#include "llvm/IR/Module.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000037#include "llvm/MC/MCAsmInfo.h"
Evandro Menezes5cee6212012-04-12 17:55:53 +000038#include "llvm/MC/MCContext.h"
39#include "llvm/MC/MCExpr.h"
40#include "llvm/MC/MCInst.h"
41#include "llvm/MC/MCSection.h"
42#include "llvm/MC/MCStreamer.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000043#include "llvm/MC/MCSymbol.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000044#include "llvm/Support/CommandLine.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000045#include "llvm/Support/Compiler.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000046#include "llvm/Support/Debug.h"
Evandro Menezes5cee6212012-04-12 17:55:53 +000047#include "llvm/Support/Format.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000048#include "llvm/Support/MathExtras.h"
Craig Topperb25fda92012-03-17 18:46:09 +000049#include "llvm/Support/TargetRegistry.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000050#include "llvm/Support/raw_ostream.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000051#include "llvm/Target/TargetInstrInfo.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000052#include "llvm/Target/TargetLoweringObjectFile.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000053#include "llvm/Target/TargetOptions.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000054#include "llvm/Target/TargetRegisterInfo.h"
Tony Linthicum1213a7a2011-12-12 21:14:40 +000055
56using namespace llvm;
57
Chandler Carruth84e68b22014-04-22 02:41:26 +000058#define DEBUG_TYPE "asm-printer"
59
Tony Linthicum1213a7a2011-12-12 21:14:40 +000060static cl::opt<bool> AlignCalls(
61 "hexagon-align-calls", cl::Hidden, cl::init(true),
62 cl::desc("Insert falign after call instruction for Hexagon target"));
63
David Blaikie94598322015-01-18 20:29:04 +000064HexagonAsmPrinter::HexagonAsmPrinter(TargetMachine &TM,
65 std::unique_ptr<MCStreamer> Streamer)
Eric Christopher8f276db2015-02-03 06:40:22 +000066 : AsmPrinter(TM, std::move(Streamer)), Subtarget(nullptr) {}
David Blaikie94598322015-01-18 20:29:04 +000067
Evandro Menezes5cee6212012-04-12 17:55:53 +000068void HexagonAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
69 raw_ostream &O) {
70 const MachineOperand &MO = MI->getOperand(OpNo);
Tony Linthicum1213a7a2011-12-12 21:14:40 +000071
Evandro Menezes5cee6212012-04-12 17:55:53 +000072 switch (MO.getType()) {
Sirish Pandef8e5e3c2012-05-03 21:52:53 +000073 default: llvm_unreachable ("<unknown operand type>");
Evandro Menezes5cee6212012-04-12 17:55:53 +000074 case MachineOperand::MO_Register:
75 O << HexagonInstPrinter::getRegisterName(MO.getReg());
76 return;
77 case MachineOperand::MO_Immediate:
78 O << MO.getImm();
79 return;
Tony Linthicum1213a7a2011-12-12 21:14:40 +000080 case MachineOperand::MO_MachineBasicBlock:
81 O << *MO.getMBB()->getSymbol();
82 return;
Tony Linthicum1213a7a2011-12-12 21:14:40 +000083 case MachineOperand::MO_ConstantPoolIndex:
84 O << *GetCPISymbol(MO.getIndex());
85 return;
Evandro Menezes5cee6212012-04-12 17:55:53 +000086 case MachineOperand::MO_GlobalAddress:
Tony Linthicum1213a7a2011-12-12 21:14:40 +000087 // Computing the address of a global symbol, not calling it.
Rafael Espindola79858aa2013-10-29 17:07:16 +000088 O << *getSymbol(MO.getGlobal());
Tony Linthicum1213a7a2011-12-12 21:14:40 +000089 printOffset(MO.getOffset(), O);
90 return;
91 }
Tony Linthicum1213a7a2011-12-12 21:14:40 +000092}
93
Tony Linthicum1213a7a2011-12-12 21:14:40 +000094//
95// isBlockOnlyReachableByFallthrough - We need to override this since the
96// default AsmPrinter does not print labels for any basic block that
97// is only reachable by a fall through. That works for all cases except
98// for the case in which the basic block is reachable by a fall through but
99// through an indirect from a jump table. In this case, the jump table
100// will contain a label not defined by AsmPrinter.
101//
102bool HexagonAsmPrinter::
103isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
104 if (MBB->hasAddressTaken()) {
105 return false;
106 }
107 return AsmPrinter::isBlockOnlyReachableByFallthrough(MBB);
108}
109
110
111/// PrintAsmOperand - Print out an operand for an inline asm expression.
112///
113bool HexagonAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
114 unsigned AsmVariant,
115 const char *ExtraCode,
Evandro Menezes5cee6212012-04-12 17:55:53 +0000116 raw_ostream &OS) {
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000117 // Does this asm operand have a single letter operand modifier?
118 if (ExtraCode && ExtraCode[0]) {
119 if (ExtraCode[1] != 0) return true; // Unknown modifier.
120
121 switch (ExtraCode[0]) {
Jack Carter5e69cff2012-06-26 13:49:27 +0000122 default:
123 // See if this is a generic print operand
124 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, OS);
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000125 case 'c': // Don't print "$" before a global var name or constant.
126 // Hexagon never has a prefix.
127 printOperand(MI, OpNo, OS);
128 return false;
129 case 'L': // Write second word of DImode reference.
130 // Verify that this operand has two consecutive registers.
131 if (!MI->getOperand(OpNo).isReg() ||
132 OpNo+1 == MI->getNumOperands() ||
133 !MI->getOperand(OpNo+1).isReg())
134 return true;
135 ++OpNo; // Return the high-part.
136 break;
137 case 'I':
138 // Write 'i' if an integer constant, otherwise nothing. Used to print
139 // addi vs add, etc.
140 if (MI->getOperand(OpNo).isImm())
141 OS << "i";
142 return false;
143 }
144 }
145
146 printOperand(MI, OpNo, OS);
147 return false;
148}
149
150bool HexagonAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
151 unsigned OpNo, unsigned AsmVariant,
152 const char *ExtraCode,
153 raw_ostream &O) {
154 if (ExtraCode && ExtraCode[0])
155 return true; // Unknown modifier.
156
157 const MachineOperand &Base = MI->getOperand(OpNo);
158 const MachineOperand &Offset = MI->getOperand(OpNo+1);
159
160 if (Base.isReg())
161 printOperand(MI, OpNo, O);
162 else
Craig Toppere55c5562012-02-07 02:50:20 +0000163 llvm_unreachable("Unimplemented");
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000164
165 if (Offset.isImm()) {
166 if (Offset.getImm())
167 O << " + #" << Offset.getImm();
168 }
169 else
Craig Toppere55c5562012-02-07 02:50:20 +0000170 llvm_unreachable("Unimplemented");
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000171
172 return false;
173}
174
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000175
176/// printMachineInstruction -- Print out a single Hexagon MI in Darwin syntax to
177/// the current output stream.
178///
179void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000180 if (MI->isBundle()) {
Colin LeMahieu7e9908e2014-12-03 20:23:22 +0000181 std::vector<MachineInstr const *> BundleMIs;
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000182
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000183 const MachineBasicBlock *MBB = MI->getParent();
184 MachineBasicBlock::const_instr_iterator MII = MI;
185 ++MII;
186 unsigned int IgnoreCount = 0;
187 while (MII != MBB->end() && MII->isInsideBundle()) {
188 const MachineInstr *MInst = MII;
189 if (MInst->getOpcode() == TargetOpcode::DBG_VALUE ||
Colin LeMahieu7e9908e2014-12-03 20:23:22 +0000190 MInst->getOpcode() == TargetOpcode::IMPLICIT_DEF) {
191 IgnoreCount++;
192 ++MII;
193 continue;
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000194 }
Colin LeMahieu7e9908e2014-12-03 20:23:22 +0000195 // BundleMIs.push_back(&*MII);
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000196 BundleMIs.push_back(MInst);
197 ++MII;
198 }
199 unsigned Size = BundleMIs.size();
Colin LeMahieu7e9908e2014-12-03 20:23:22 +0000200 assert((Size + IgnoreCount) == MI->getBundleSize() && "Corrupt Bundle!");
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000201 for (unsigned Index = 0; Index < Size; Index++) {
Colin LeMahieu52418812014-11-04 00:14:36 +0000202 HexagonMCInst MCI;
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000203
204 HexagonLowerToMC(BundleMIs[Index], MCI, *this);
Colin LeMahieu7e9908e2014-12-03 20:23:22 +0000205 HexagonMCInst::AppendImplicitOperands(MCI);
206 MCI.setPacketBegin(Index == 0);
207 MCI.setPacketEnd(Index == (Size - 1));
David Woodhousee6c13e42014-01-28 23:12:42 +0000208 EmitToStreamer(OutStreamer, MCI);
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000209 }
210 }
211 else {
Colin LeMahieu52418812014-11-04 00:14:36 +0000212 HexagonMCInst MCI;
Colin LeMahieu7e9908e2014-12-03 20:23:22 +0000213 HexagonLowerToMC(MI, MCI, *this);
214 HexagonMCInst::AppendImplicitOperands(MCI);
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000215 if (MI->getOpcode() == Hexagon::ENDLOOP0) {
Colin LeMahieub4e5be42014-12-03 17:31:43 +0000216 MCI.setPacketBegin(true);
Jyotsna Verma7503a622013-02-20 16:13:27 +0000217 MCI.setPacketEnd(true);
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000218 }
David Woodhousee6c13e42014-01-28 23:12:42 +0000219 EmitToStreamer(OutStreamer, MCI);
Sirish Pandef8e5e3c2012-05-03 21:52:53 +0000220 }
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000221
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000222 return;
223}
224
Evandro Menezes5cee6212012-04-12 17:55:53 +0000225static MCInstPrinter *createHexagonMCInstPrinter(const Target &T,
226 unsigned SyntaxVariant,
227 const MCAsmInfo &MAI,
228 const MCInstrInfo &MII,
229 const MCRegisterInfo &MRI,
230 const MCSubtargetInfo &STI) {
231 if (SyntaxVariant == 0)
232 return(new HexagonInstPrinter(MAI, MII, MRI));
233 else
Craig Topper062a2ba2014-04-25 05:30:21 +0000234 return nullptr;
Evandro Menezes5cee6212012-04-12 17:55:53 +0000235}
236
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000237extern "C" void LLVMInitializeHexagonAsmPrinter() {
238 RegisterAsmPrinter<HexagonAsmPrinter> X(TheHexagonTarget);
Evandro Menezes5cee6212012-04-12 17:55:53 +0000239
240 TargetRegistry::RegisterMCInstPrinter(TheHexagonTarget,
241 createHexagonMCInstPrinter);
Tony Linthicum1213a7a2011-12-12 21:14:40 +0000242}