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Dean Michael Berrisd1617cd2016-09-20 14:35:57 +00001//===-- xray_arm.cc ---------------------------------------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file is a part of XRay, a dynamic runtime instrumentation system.
11//
12// Implementation of ARM-specific routines (32-bit).
13//
14//===----------------------------------------------------------------------===//
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000015#include "sanitizer_common/sanitizer_common.h"
Diana Picus87d025f2016-11-16 09:32:23 +000016#include "xray_defs.h"
Diana Picus6b88e322016-12-22 07:35:56 +000017#include "xray_emulate_tsc.h"
Dean Michael Berris4ef1a692016-10-06 07:09:40 +000018#include "xray_interface_internal.h"
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000019#include <atomic>
20#include <cassert>
21
22namespace __xray {
23
Diana Picus6b88e322016-12-22 07:35:56 +000024uint64_t cycleFrequency() XRAY_NEVER_INSTRUMENT {
25 // There is no instruction like RDTSCP in user mode on ARM. ARM's CP15 does
26 // not have a constant frequency like TSC on x86[_64]; it may go faster or
27 // slower depending on CPU's turbo or power saving modes. Furthermore, to
28 // read from CP15 on ARM a kernel modification or a driver is needed.
29 // We can not require this from users of compiler-rt.
30 // So on ARM we use clock_gettime(2) which gives the result in nanoseconds.
31 // To get the measurements per second, we scale this by the number of
32 // nanoseconds per second, pretending that the TSC frequency is 1GHz and
33 // one TSC tick is 1 nanosecond.
34 return NanosecondsPerSecond;
35}
36
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000037// The machine codes for some instructions used in runtime patching.
Dean Michael Berris4ef1a692016-10-06 07:09:40 +000038enum class PatchOpcodes : uint32_t {
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000039 PO_PushR0Lr = 0xE92D4001, // PUSH {r0, lr}
Dean Michael Berris4ef1a692016-10-06 07:09:40 +000040 PO_BlxIp = 0xE12FFF3C, // BLX ip
41 PO_PopR0Lr = 0xE8BD4001, // POP {r0, lr}
42 PO_B20 = 0xEA000005 // B #20
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000043};
44
45// 0xUUUUWXYZ -> 0x000W0XYZ
Dean Michael Berris4031e4b2016-11-16 01:01:13 +000046inline static uint32_t getMovwMask(const uint32_t Value) XRAY_NEVER_INSTRUMENT {
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000047 return (Value & 0xfff) | ((Value & 0xf000) << 4);
48}
49
50// 0xWXYZUUUU -> 0x000W0XYZ
Dean Michael Berris4031e4b2016-11-16 01:01:13 +000051inline static uint32_t getMovtMask(const uint32_t Value) XRAY_NEVER_INSTRUMENT {
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000052 return getMovwMask(Value >> 16);
53}
54
55// Writes the following instructions:
56// MOVW R<regNo>, #<lower 16 bits of the |Value|>
57// MOVT R<regNo>, #<higher 16 bits of the |Value|>
Dean Michael Berris4031e4b2016-11-16 01:01:13 +000058inline static uint32_t *
59write32bitLoadReg(uint8_t regNo, uint32_t *Address,
60 const uint32_t Value) XRAY_NEVER_INSTRUMENT {
Dean Michael Berris4ef1a692016-10-06 07:09:40 +000061 // This is a fatal error: we cannot just report it and continue execution.
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000062 assert(regNo <= 15 && "Register number must be 0 to 15.");
63 // MOVW R, #0xWXYZ in machine code is 0xE30WRXYZ
Dean Michael Berris4ef1a692016-10-06 07:09:40 +000064 *Address = (0xE3000000 | (uint32_t(regNo) << 12) | getMovwMask(Value));
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000065 Address++;
66 // MOVT R, #0xWXYZ in machine code is 0xE34WRXYZ
Dean Michael Berris4ef1a692016-10-06 07:09:40 +000067 *Address = (0xE3400000 | (uint32_t(regNo) << 12) | getMovtMask(Value));
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000068 return Address + 1;
69}
70
71// Writes the following instructions:
72// MOVW r0, #<lower 16 bits of the |Value|>
73// MOVT r0, #<higher 16 bits of the |Value|>
Dean Michael Berris4031e4b2016-11-16 01:01:13 +000074inline static uint32_t *
75Write32bitLoadR0(uint32_t *Address,
76 const uint32_t Value) XRAY_NEVER_INSTRUMENT {
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000077 return write32bitLoadReg(0, Address, Value);
78}
79
80// Writes the following instructions:
81// MOVW ip, #<lower 16 bits of the |Value|>
82// MOVT ip, #<higher 16 bits of the |Value|>
Dean Michael Berris4031e4b2016-11-16 01:01:13 +000083inline static uint32_t *
84Write32bitLoadIP(uint32_t *Address,
85 const uint32_t Value) XRAY_NEVER_INSTRUMENT {
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000086 return write32bitLoadReg(12, Address, Value);
87}
88
89inline static bool patchSled(const bool Enable, const uint32_t FuncId,
Dean Michael Berris4031e4b2016-11-16 01:01:13 +000090 const XRaySledEntry &Sled,
91 void (*TracingHook)()) XRAY_NEVER_INSTRUMENT {
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +000092 // When |Enable| == true,
93 // We replace the following compile-time stub (sled):
94 //
95 // xray_sled_n:
96 // B #20
97 // 6 NOPs (24 bytes)
98 //
99 // With the following runtime patch:
100 //
101 // xray_sled_n:
102 // PUSH {r0, lr}
103 // MOVW r0, #<lower 16 bits of function ID>
104 // MOVT r0, #<higher 16 bits of function ID>
105 // MOVW ip, #<lower 16 bits of address of TracingHook>
106 // MOVT ip, #<higher 16 bits of address of TracingHook>
107 // BLX ip
108 // POP {r0, lr}
109 //
110 // Replacement of the first 4-byte instruction should be the last and atomic
111 // operation, so that the user code which reaches the sled concurrently
112 // either jumps over the whole sled, or executes the whole sled when the
113 // latter is ready.
114 //
115 // When |Enable|==false, we set back the first instruction in the sled to be
116 // B #20
117
118 uint32_t *FirstAddress = reinterpret_cast<uint32_t *>(Sled.Address);
119 if (Enable) {
120 uint32_t *CurAddress = FirstAddress + 1;
121 CurAddress =
122 Write32bitLoadR0(CurAddress, reinterpret_cast<uint32_t>(FuncId));
123 CurAddress =
124 Write32bitLoadIP(CurAddress, reinterpret_cast<uint32_t>(TracingHook));
125 *CurAddress = uint32_t(PatchOpcodes::PO_BlxIp);
126 CurAddress++;
127 *CurAddress = uint32_t(PatchOpcodes::PO_PopR0Lr);
128 std::atomic_store_explicit(
129 reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress),
130 uint32_t(PatchOpcodes::PO_PushR0Lr), std::memory_order_release);
131 } else {
132 std::atomic_store_explicit(
133 reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress),
134 uint32_t(PatchOpcodes::PO_B20), std::memory_order_release);
135 }
136 return true;
137}
138
139bool patchFunctionEntry(const bool Enable, const uint32_t FuncId,
Dean Michael Berris4031e4b2016-11-16 01:01:13 +0000140 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +0000141 return patchSled(Enable, FuncId, Sled, __xray_FunctionEntry);
142}
143
144bool patchFunctionExit(const bool Enable, const uint32_t FuncId,
Dean Michael Berris4031e4b2016-11-16 01:01:13 +0000145 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +0000146 return patchSled(Enable, FuncId, Sled, __xray_FunctionExit);
147}
148
Dean Michael Berris1b09aae2016-10-13 23:56:54 +0000149bool patchFunctionTailExit(const bool Enable, const uint32_t FuncId,
Dean Michael Berris4031e4b2016-11-16 01:01:13 +0000150 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
Dean Michael Berris1b09aae2016-10-13 23:56:54 +0000151 // FIXME: In the future we'd need to distinguish between non-tail exits and
152 // tail exits for better information preservation.
153 return patchSled(Enable, FuncId, Sled, __xray_FunctionExit);
154}
155
Dean Michael Berrisd1617cd2016-09-20 14:35:57 +0000156} // namespace __xray