blob: 435c63a51d89c1b60afb4549c4cf2621127104f6 [file] [log] [blame]
Dan Gohman10e730a2015-06-29 23:51:55 +00001//- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -//
2//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Dan Gohman10e730a2015-06-29 23:51:55 +00006//
7//===----------------------------------------------------------------------===//
8///
9/// \file
Adrian Prantl5f8f34e42018-05-01 15:54:18 +000010/// This file defines an instruction selector for the WebAssembly target.
Dan Gohman10e730a2015-06-29 23:51:55 +000011///
12//===----------------------------------------------------------------------===//
13
Dan Gohman10e730a2015-06-29 23:51:55 +000014#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
Chandler Carruth6bda14b2017-06-06 11:49:48 +000015#include "WebAssembly.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000016#include "WebAssemblyTargetMachine.h"
17#include "llvm/CodeGen/SelectionDAGISel.h"
Guanzhong Chen42bba4b2019-07-16 22:00:45 +000018#include "llvm/IR/DiagnosticInfo.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000019#include "llvm/IR/Function.h" // To access function attributes.
20#include "llvm/Support/Debug.h"
Craig Topper053cf4d2017-04-28 08:15:33 +000021#include "llvm/Support/KnownBits.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000022#include "llvm/Support/MathExtras.h"
23#include "llvm/Support/raw_ostream.h"
24using namespace llvm;
25
26#define DEBUG_TYPE "wasm-isel"
27
28//===--------------------------------------------------------------------===//
29/// WebAssembly-specific code to select WebAssembly machine instructions for
30/// SelectionDAG operations.
31///
32namespace {
33class WebAssemblyDAGToDAGISel final : public SelectionDAGISel {
34 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
35 /// right decision when generating code for different targets.
36 const WebAssemblySubtarget *Subtarget;
37
Dan Gohman10e730a2015-06-29 23:51:55 +000038public:
Heejin Ahn18c56a02019-02-04 19:13:39 +000039 WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &TM,
Dan Gohman10e730a2015-06-29 23:51:55 +000040 CodeGenOpt::Level OptLevel)
Hiroshi Yamauchi70a3c9f2019-11-21 13:21:48 -080041 : SelectionDAGISel(TM, OptLevel), Subtarget(nullptr) {
Dan Gohman10e730a2015-06-29 23:51:55 +000042 }
43
Mehdi Amini117296c2016-10-01 02:56:57 +000044 StringRef getPassName() const override {
Dan Gohman10e730a2015-06-29 23:51:55 +000045 return "WebAssembly Instruction Selection";
46 }
47
48 bool runOnMachineFunction(MachineFunction &MF) override {
Heejin Ahn569f0902019-01-09 23:05:21 +000049 LLVM_DEBUG(dbgs() << "********** ISelDAGToDAG **********\n"
50 "********** Function: "
51 << MF.getName() << '\n');
52
Dan Gohman10e730a2015-06-29 23:51:55 +000053 Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
Thomas Lively5b74c392019-10-02 17:34:44 +000054
55 // Wasm64 is not fully supported right now (and is not specified)
56 if (Subtarget->hasAddr64())
57 report_fatal_error(
58 "64-bit WebAssembly (wasm64) is not currently supported");
59
Dan Gohman10e730a2015-06-29 23:51:55 +000060 return SelectionDAGISel::runOnMachineFunction(MF);
61 }
62
Justin Bognerc6afd4b2016-05-13 22:44:57 +000063 void Select(SDNode *Node) override;
Dan Gohman10e730a2015-06-29 23:51:55 +000064
Dan Gohmanf19ed562015-11-13 01:42:29 +000065 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
66 std::vector<SDValue> &OutOps) override;
67
JF Bastienb9073fb2015-07-22 21:28:15 +000068// Include the pieces autogenerated from the target description.
69#include "WebAssemblyGenDAGISel.inc"
70
Dan Gohman10e730a2015-06-29 23:51:55 +000071private:
72 // add select functions here...
73};
74} // end anonymous namespace
75
Justin Bognerc6afd4b2016-05-13 22:44:57 +000076void WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
JF Bastienb9073fb2015-07-22 21:28:15 +000077 // If we have a custom node, we already have selected!
78 if (Node->isMachineOpcode()) {
Nicola Zaghend34e60c2018-05-14 12:53:11 +000079 LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
JF Bastienb9073fb2015-07-22 21:28:15 +000080 Node->setNodeId(-1);
Justin Bognerc6afd4b2016-05-13 22:44:57 +000081 return;
JF Bastienb9073fb2015-07-22 21:28:15 +000082 }
83
Heejin Ahn55146582019-05-28 22:09:12 +000084 // Few custom selection stuff.
85 SDLoc DL(Node);
86 MachineFunction &MF = CurDAG->getMachineFunction();
JF Bastienb9073fb2015-07-22 21:28:15 +000087 switch (Node->getOpcode()) {
Heejin Ahn55146582019-05-28 22:09:12 +000088 case ISD::ATOMIC_FENCE: {
89 if (!MF.getSubtarget<WebAssemblySubtarget>().hasAtomics())
90 break;
91
92 uint64_t SyncScopeID =
93 cast<ConstantSDNode>(Node->getOperand(2).getNode())->getZExtValue();
Heejin Ahnd85fd5a2019-08-28 23:13:43 +000094 MachineSDNode *Fence = nullptr;
Heejin Ahn55146582019-05-28 22:09:12 +000095 switch (SyncScopeID) {
Heejin Ahnd85fd5a2019-08-28 23:13:43 +000096 case SyncScope::SingleThread:
Heejin Ahn55146582019-05-28 22:09:12 +000097 // We lower a single-thread fence to a pseudo compiler barrier instruction
98 // preventing instruction reordering. This will not be emitted in final
99 // binary.
Heejin Ahnd85fd5a2019-08-28 23:13:43 +0000100 Fence = CurDAG->getMachineNode(WebAssembly::COMPILER_FENCE,
101 DL, // debug loc
102 MVT::Other, // outchain type
103 Node->getOperand(0) // inchain
104 );
105 break;
106 case SyncScope::System:
107 // Currently wasm only supports sequentially consistent atomics, so we
108 // always set the order to 0 (sequentially consistent).
109 Fence = CurDAG->getMachineNode(
110 WebAssembly::ATOMIC_FENCE,
111 DL, // debug loc
112 MVT::Other, // outchain type
113 CurDAG->getTargetConstant(0, DL, MVT::i32), // order
114 Node->getOperand(0) // inchain
115 );
116 break;
Heejin Ahn55146582019-05-28 22:09:12 +0000117 default:
118 llvm_unreachable("Unknown scope!");
119 }
Heejin Ahnd85fd5a2019-08-28 23:13:43 +0000120
121 ReplaceNode(Node, Fence);
122 CurDAG->RemoveDeadNode(Node);
123 return;
Heejin Ahn55146582019-05-28 22:09:12 +0000124 }
125
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000126 case ISD::GlobalTLSAddress: {
127 const auto *GA = cast<GlobalAddressSDNode>(Node);
128
129 if (!MF.getSubtarget<WebAssemblySubtarget>().hasBulkMemory())
130 report_fatal_error("cannot use thread-local storage without bulk memory",
131 false);
132
Guanzhong Chen0a8d4df2019-07-16 22:22:08 +0000133 // Currently Emscripten does not support dynamic linking with threads.
134 // Therefore, if we have thread-local storage, only the local-exec model
135 // is possible.
136 // TODO: remove this and implement proper TLS models once Emscripten
137 // supports dynamic linking with threads.
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000138 if (GA->getGlobal()->getThreadLocalMode() !=
Guanzhong Chen0a8d4df2019-07-16 22:22:08 +0000139 GlobalValue::LocalExecTLSModel &&
140 !Subtarget->getTargetTriple().isOSEmscripten()) {
141 report_fatal_error("only -ftls-model=local-exec is supported for now on "
142 "non-Emscripten OSes: variable " +
143 GA->getGlobal()->getName(),
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000144 false);
145 }
146
147 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
148 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
149
150 SDValue TLSBaseSym = CurDAG->getTargetExternalSymbol("__tls_base", PtrVT);
151 SDValue TLSOffsetSym = CurDAG->getTargetGlobalAddress(
152 GA->getGlobal(), DL, PtrVT, GA->getOffset(), 0);
153
154 MachineSDNode *TLSBase = CurDAG->getMachineNode(WebAssembly::GLOBAL_GET_I32,
155 DL, MVT::i32, TLSBaseSym);
156 MachineSDNode *TLSOffset = CurDAG->getMachineNode(
157 WebAssembly::CONST_I32, DL, MVT::i32, TLSOffsetSym);
158 MachineSDNode *TLSAddress =
159 CurDAG->getMachineNode(WebAssembly::ADD_I32, DL, MVT::i32,
160 SDValue(TLSBase, 0), SDValue(TLSOffset, 0));
161 ReplaceNode(Node, TLSAddress);
162 return;
163 }
164
165 case ISD::INTRINSIC_WO_CHAIN: {
166 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
167 switch (IntNo) {
168 case Intrinsic::wasm_tls_size: {
169 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
170 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
171
172 MachineSDNode *TLSSize = CurDAG->getMachineNode(
173 WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
174 CurDAG->getTargetExternalSymbol("__tls_size", MVT::i32));
175 ReplaceNode(Node, TLSSize);
176 return;
177 }
Guanzhong Chen5204f762019-07-19 23:34:16 +0000178 case Intrinsic::wasm_tls_align: {
179 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
180 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
181
182 MachineSDNode *TLSAlign = CurDAG->getMachineNode(
183 WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
184 CurDAG->getTargetExternalSymbol("__tls_align", MVT::i32));
185 ReplaceNode(Node, TLSAlign);
186 return;
187 }
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000188 }
189 break;
190 }
Guanzhong Chen801fa8e2019-07-18 17:53:22 +0000191 case ISD::INTRINSIC_W_CHAIN: {
192 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
193 switch (IntNo) {
194 case Intrinsic::wasm_tls_base: {
195 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
196 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
197
198 MachineSDNode *TLSBase = CurDAG->getMachineNode(
Guanzhong Chendf447922019-07-18 21:17:52 +0000199 WebAssembly::GLOBAL_GET_I32, DL, MVT::i32, MVT::Other,
Guanzhong Chen801fa8e2019-07-18 17:53:22 +0000200 CurDAG->getTargetExternalSymbol("__tls_base", PtrVT),
201 Node->getOperand(0));
202 ReplaceNode(Node, TLSBase);
203 return;
204 }
205 }
206 break;
207 }
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000208
JF Bastienb9073fb2015-07-22 21:28:15 +0000209 default:
210 break;
JF Bastienb9073fb2015-07-22 21:28:15 +0000211 }
212
213 // Select the default instruction.
Justin Bognerc6afd4b2016-05-13 22:44:57 +0000214 SelectCode(Node);
Dan Gohman10e730a2015-06-29 23:51:55 +0000215}
216
Dan Gohmanf19ed562015-11-13 01:42:29 +0000217bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand(
218 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
219 switch (ConstraintID) {
220 case InlineAsm::Constraint_i:
221 case InlineAsm::Constraint_m:
222 // We just support simple memory operands that just have a single address
223 // operand and need no special handling.
224 OutOps.push_back(Op);
225 return false;
226 default:
227 break;
228 }
229
230 return true;
231}
232
Dan Gohman10e730a2015-06-29 23:51:55 +0000233/// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready
234/// for instruction scheduling.
235FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
236 CodeGenOpt::Level OptLevel) {
237 return new WebAssemblyDAGToDAGISel(TM, OptLevel);
238}