| Simon Pilgrim | fc4d4b2 | 2016-07-19 13:35:11 +0000 | [diff] [blame] | 1 | ; RUN: llc -mtriple=arm64-apple-darwin < %s | FileCheck %s |
| Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 2 | ; Check that the peephole optimizer knows about sext and zext instructions. |
| 3 | ; CHECK: test1sext |
| 4 | define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind { |
| 5 | %C = add i64 %A, %B |
| 6 | ; CHECK: add x[[SUM:[0-9]+]], x0, x1 |
| 7 | %D = trunc i64 %C to i32 |
| 8 | %E = shl i64 %C, 32 |
| 9 | %F = ashr i64 %E, 32 |
| Jim Grosbach | 0fba6d9 | 2014-04-17 20:47:31 +0000 | [diff] [blame] | 10 | ; CHECK: sxtw x[[EXT:[0-9]+]], w[[SUM]] |
| Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 11 | store volatile i64 %F, i64 *%P2 |
| 12 | ; CHECK: str x[[EXT]] |
| 13 | store volatile i32 %D, i32* %P |
| 14 | ; Reuse low bits of extended register, don't extend live range of SUM. |
| 15 | ; CHECK: str w[[SUM]] |
| 16 | ret i32 %D |
| 17 | } |