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Jason Molenda74b8fbc2016-09-29 01:00:16 +00001//===-- Testx86AssemblyInspectionEngine.cpp ---------------------------*- C++
2//-*-===//
3
4//
5// The LLVM Compiler Infrastructure
6//
7// This file is distributed under the University of Illinois Open Source
8// License. See LICENSE.TXT for details.
9//
10//===----------------------------------------------------------------------===//
11
12#include "gtest/gtest.h"
13
14#include <vector>
15
16#include "Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.h"
17#include "lldb/Core/Address.h"
18#include "lldb/Core/AddressRange.h"
19#include "lldb/Core/ArchSpec.h"
20#include "lldb/Symbol/UnwindPlan.h"
21
22#include "llvm/Support/TargetSelect.h"
23
24using namespace lldb;
25using namespace lldb_private;
26
27class Testx86AssemblyInspectionEngine : public testing::Test {
28public:
29 // static void SetUpTestCase() { }
30
31 // static void TearDownTestCase() { }
32
33 // virtual void SetUp() override { }
34
35 // virtual void TearDown() override { }
36
37protected:
38};
39
40// only defining the register names / numbers that the unwinder is actually
41// using today
42
43// names should match the constants below. These will be the eRegisterKindLLDB
44// register numbers.
45
46const char *x86_64_reg_names[] = {"rax", "rcx", "rdx", "rsp", "rbp", "rsi",
47 "rdi", "r8", "r9", "r10", "r11", "r12",
48 "r13", "r14", "r15", "rip"};
49
50enum x86_64_regs {
51 k_rax = 0,
52 k_rcx = 1,
53 k_rdx = 2,
54 k_rsp = 3,
55 k_rbp = 4,
56 k_rsi = 5,
57 k_rdi = 6,
58 k_r8 = 7,
59 k_r9 = 8,
60 k_r10 = 9,
61 k_r11 = 10,
62 k_r12 = 11,
63 k_r13 = 12,
64 k_r14 = 13,
65 k_r15 = 14,
66 k_rip = 15
67};
68
69// names should match the constants below. These will be the eRegisterKindLLDB
70// register numbers.
71
72const char *i386_reg_names[] = {"eax", "ecx", "edx", "ebx", "esp",
73 "ebp", "esi", "edi", "eip"};
74
75enum i386_regs {
76 k_eax = 0,
77 k_ecx = 1,
78 k_edx = 2,
79 k_ebx = 3,
80 k_esp = 4,
81 k_ebp = 5,
82 k_esi = 6,
83 k_edi = 7,
84 k_eip = 8
85};
86
87std::unique_ptr<x86AssemblyInspectionEngine> Getx86_64Inspector() {
88
89 ArchSpec arch("x86_64-apple-macosx", nullptr);
90 llvm::InitializeAllTargets();
91 llvm::InitializeAllAsmPrinters();
92 llvm::InitializeAllTargetMCs();
93 llvm::InitializeAllDisassemblers();
94 std::unique_ptr<x86AssemblyInspectionEngine> engine(
95 new x86AssemblyInspectionEngine(arch));
96
97 std::vector<x86AssemblyInspectionEngine::lldb_reg_info> lldb_regnums;
98 int i = 0;
99 for (const auto &name : x86_64_reg_names) {
100 x86AssemblyInspectionEngine::lldb_reg_info ri;
101 ri.name = name;
102 ri.lldb_regnum = i++;
103 lldb_regnums.push_back(ri);
104 }
105
106 engine->Initialize(lldb_regnums);
107 return engine;
108}
109
110std::unique_ptr<x86AssemblyInspectionEngine> Geti386Inspector() {
111
112 ArchSpec arch("i386-apple-macosx", nullptr);
113 llvm::InitializeAllTargets();
114 llvm::InitializeAllAsmPrinters();
115 llvm::InitializeAllTargetMCs();
116 llvm::InitializeAllDisassemblers();
117 std::unique_ptr<x86AssemblyInspectionEngine> engine(
118 new x86AssemblyInspectionEngine(arch));
119
120 std::vector<x86AssemblyInspectionEngine::lldb_reg_info> lldb_regnums;
121 int i = 0;
122 for (const auto &name : i386_reg_names) {
123 x86AssemblyInspectionEngine::lldb_reg_info ri;
124 ri.name = name;
125 ri.lldb_regnum = i++;
126 lldb_regnums.push_back(ri);
127 }
128
129 engine->Initialize(lldb_regnums);
130 return engine;
131}
132
133TEST_F(Testx86AssemblyInspectionEngine, TestSimple64bitFrameFunction) {
134 std::unique_ptr<x86AssemblyInspectionEngine> engine = Getx86_64Inspector();
135
136 uint8_t data[] = {
137 0x55, // offset 0 -- pushq %rbp
138 0x48, 0x89, 0xe5, // offset 1 -- movq %rsp, %rbp
139 0x31, 0xc0, // offset 4 -- xorl %eax, %eax
140 0x5d, // offset 6 -- popq %rbp
141 0xc3 // offset 7 -- retq
142 };
143
144 AddressRange sample_range(0x1000, sizeof(data));
145
146 UnwindPlan unwind_plan(eRegisterKindLLDB);
147 EXPECT_TRUE(engine->GetNonCallSiteUnwindPlanFromAssembly(
148 data, sizeof(data), sample_range, unwind_plan));
149
150 // Expect four unwind rows:
151 // 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8]
152 // 1: CFA=rsp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8]
153 // 4: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8]
154 // 7: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8]
155
156 EXPECT_TRUE(unwind_plan.GetInitialCFARegister() == k_rsp);
157 EXPECT_TRUE(unwind_plan.GetUnwindPlanValidAtAllInstructions() ==
158 eLazyBoolYes);
159 EXPECT_TRUE(unwind_plan.GetSourcedFromCompiler() == eLazyBoolNo);
160
161 UnwindPlan::Row::RegisterLocation regloc;
162
163 // 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8]
164 UnwindPlan::RowSP row_sp = unwind_plan.GetRowForFunctionOffset(0);
165 EXPECT_TRUE(row_sp->GetOffset() == 0);
166 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rsp);
167 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
168 EXPECT_TRUE(row_sp->GetCFAValue().GetOffset() == 8);
169
170 EXPECT_TRUE(row_sp->GetRegisterInfo(k_rip, regloc));
171 EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
172 EXPECT_TRUE(regloc.GetOffset() == -8);
173
174 // 1: CFA=rsp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8]
175 row_sp = unwind_plan.GetRowForFunctionOffset(1);
176 EXPECT_TRUE(row_sp->GetOffset() == 1);
177 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rsp);
178 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
179 EXPECT_TRUE(row_sp->GetCFAValue().GetOffset() == 16);
180
181 EXPECT_TRUE(row_sp->GetRegisterInfo(k_rip, regloc));
182 EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
183 EXPECT_TRUE(regloc.GetOffset() == -8);
184
185 // 4: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8]
186 row_sp = unwind_plan.GetRowForFunctionOffset(4);
187 EXPECT_TRUE(row_sp->GetOffset() == 4);
188 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rbp);
189 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
190 EXPECT_TRUE(row_sp->GetCFAValue().GetOffset() == 16);
191
192 EXPECT_TRUE(row_sp->GetRegisterInfo(k_rip, regloc));
193 EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
194 EXPECT_TRUE(regloc.GetOffset() == -8);
195
196 // 7: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8]
197 row_sp = unwind_plan.GetRowForFunctionOffset(7);
198 EXPECT_TRUE(row_sp->GetOffset() == 7);
199 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rsp);
200 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
201 EXPECT_TRUE(row_sp->GetCFAValue().GetOffset() == 8);
202
203 EXPECT_TRUE(row_sp->GetRegisterInfo(k_rip, regloc));
204 EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
205 EXPECT_TRUE(regloc.GetOffset() == -8);
206}
207
208TEST_F(Testx86AssemblyInspectionEngine, TestSimple32bitFrameFunction) {
209 std::unique_ptr<x86AssemblyInspectionEngine> engine = Geti386Inspector();
210
211 uint8_t data[] = {
212 0x55, // offset 0 -- pushl %ebp
213 0x89, 0xe5, // offset 1 -- movl %esp, %ebp
214 0x31, 0xc0, // offset 3 -- xorl %eax, %eax
215 0x5d, // offset 5 -- popl %ebp
216 0xc3 // offset 6 -- retl
217 };
218
219 AddressRange sample_range(0x1000, sizeof(data));
220
221 UnwindPlan unwind_plan(eRegisterKindLLDB);
222 EXPECT_TRUE(engine->GetNonCallSiteUnwindPlanFromAssembly(
223 data, sizeof(data), sample_range, unwind_plan));
224
225 // Expect four unwind rows:
226 // 0: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
227 // 1: CFA=esp +8 => ebp=[CFA-8] esp=CFA+0 eip=[CFA-4]
228 // 3: CFA=ebp +8 => ebp=[CFA-8] esp=CFA+0 eip=[CFA-4]
229 // 6: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
230
231 EXPECT_TRUE(unwind_plan.GetInitialCFARegister() == k_esp);
232 EXPECT_TRUE(unwind_plan.GetUnwindPlanValidAtAllInstructions() ==
233 eLazyBoolYes);
234 EXPECT_TRUE(unwind_plan.GetSourcedFromCompiler() == eLazyBoolNo);
235
236 UnwindPlan::Row::RegisterLocation regloc;
237
238 // offset 0 -- pushl %ebp
239 UnwindPlan::RowSP row_sp = unwind_plan.GetRowForFunctionOffset(0);
240 EXPECT_TRUE(row_sp->GetOffset() == 0);
241 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_esp);
242 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
243 EXPECT_TRUE(row_sp->GetCFAValue().GetOffset() == 4);
244
245 EXPECT_TRUE(row_sp->GetRegisterInfo(k_eip, regloc));
246 EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
247 EXPECT_TRUE(regloc.GetOffset() == -4);
248
249 // 1: CFA=esp +8 => ebp=[CFA-8] esp=CFA+0 eip=[CFA-4]
250 row_sp = unwind_plan.GetRowForFunctionOffset(1);
251 EXPECT_TRUE(row_sp->GetOffset() == 1);
252 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_esp);
253 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
254 EXPECT_TRUE(row_sp->GetCFAValue().GetOffset() == 8);
255
256 EXPECT_TRUE(row_sp->GetRegisterInfo(k_eip, regloc));
257 EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
258 EXPECT_TRUE(regloc.GetOffset() == -4);
259
260 // 3: CFA=ebp +8 => ebp=[CFA-8] esp=CFA+0 eip=[CFA-4]
261 row_sp = unwind_plan.GetRowForFunctionOffset(3);
262 EXPECT_TRUE(row_sp->GetOffset() == 3);
263 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_ebp);
264 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
265 EXPECT_TRUE(row_sp->GetCFAValue().GetOffset() == 8);
266
267 EXPECT_TRUE(row_sp->GetRegisterInfo(k_eip, regloc));
268 EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
269 EXPECT_TRUE(regloc.GetOffset() == -4);
270
271 // 6: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
272 row_sp = unwind_plan.GetRowForFunctionOffset(6);
273 EXPECT_TRUE(row_sp->GetOffset() == 6);
274 EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_esp);
275 EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
276 EXPECT_TRUE(row_sp->GetCFAValue().GetOffset() == 4);
277
278 EXPECT_TRUE(row_sp->GetRegisterInfo(k_eip, regloc));
279 EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
280 EXPECT_TRUE(regloc.GetOffset() == -4);
281}