blob: 757b73352261511e20fa1f6691133e80288f1327 [file] [log] [blame]
Tom Stellard75aadc22012-12-11 21:25:42 +00001set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
2
3tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12add_public_tablegen_target(AMDGPUCommonTableGen)
13
14add_llvm_target(R600CodeGen
15 AMDIL7XXDevice.cpp
16 AMDILCFGStructurizer.cpp
17 AMDILDevice.cpp
18 AMDILDeviceInfo.cpp
19 AMDILEvergreenDevice.cpp
20 AMDILFrameLowering.cpp
21 AMDILIntrinsicInfo.cpp
22 AMDILISelDAGToDAG.cpp
23 AMDILISelLowering.cpp
24 AMDILNIDevice.cpp
25 AMDILPeepholeOptimizer.cpp
26 AMDILSIDevice.cpp
27 AMDGPUAsmPrinter.cpp
28 AMDGPUMCInstLower.cpp
29 AMDGPUSubtarget.cpp
30 AMDGPUTargetMachine.cpp
31 AMDGPUISelLowering.cpp
32 AMDGPUConvertToISA.cpp
33 AMDGPUInstrInfo.cpp
34 AMDGPURegisterInfo.cpp
35 R600ExpandSpecialInstrs.cpp
36 R600InstrInfo.cpp
37 R600ISelLowering.cpp
38 R600MachineFunctionInfo.cpp
39 R600RegisterInfo.cpp
40 SIAssignInterpRegs.cpp
41 SIInstrInfo.cpp
42 SIISelLowering.cpp
43 SILowerLiteralConstants.cpp
44 SILowerControlFlow.cpp
45 SIMachineFunctionInfo.cpp
46 SIRegisterInfo.cpp
47 SIFixSGPRLiveness.cpp
48 )
49
50add_dependencies(LLVMR600CodeGen intrinsics_gen)
51
52add_subdirectory(InstPrinter)
53add_subdirectory(TargetInfo)
54add_subdirectory(MCTargetDesc)