Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame^] | 1 | //===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | /// \file |
| 11 | /// \brief Provides AMDGPU specific target descriptions. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | // |
| 15 | |
| 16 | #ifndef AMDGPUMCTARGETDESC_H |
| 17 | #define AMDGPUMCTARGETDESC_H |
| 18 | |
| 19 | #include "llvm/ADT/StringRef.h" |
| 20 | |
| 21 | namespace llvm { |
| 22 | class MCAsmBackend; |
| 23 | class MCCodeEmitter; |
| 24 | class MCContext; |
| 25 | class MCInstrInfo; |
| 26 | class MCRegisterInfo; |
| 27 | class MCSubtargetInfo; |
| 28 | class Target; |
| 29 | |
| 30 | extern Target TheAMDGPUTarget; |
| 31 | |
| 32 | MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, |
| 33 | const MCRegisterInfo &MRI, |
| 34 | const MCSubtargetInfo &STI, |
| 35 | MCContext &Ctx); |
| 36 | |
| 37 | MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII, |
| 38 | const MCRegisterInfo &MRI, |
| 39 | const MCSubtargetInfo &STI, |
| 40 | MCContext &Ctx); |
| 41 | |
| 42 | MCAsmBackend *createAMDGPUAsmBackend(const Target &T, StringRef TT, |
| 43 | StringRef CPU); |
| 44 | } // End llvm namespace |
| 45 | |
| 46 | #define GET_REGINFO_ENUM |
| 47 | #include "AMDGPUGenRegisterInfo.inc" |
| 48 | |
| 49 | #define GET_INSTRINFO_ENUM |
| 50 | #include "AMDGPUGenInstrInfo.inc" |
| 51 | |
| 52 | #define GET_SUBTARGETINFO_ENUM |
| 53 | #include "AMDGPUGenSubtargetInfo.inc" |
| 54 | |
| 55 | #endif // AMDGPUMCTARGETDESC_H |