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Tom Stellard75aadc22012-12-11 21:25:42 +00001//===-- AMDGPUSubtarget.cpp - AMDGPU Subtarget Information ----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief Implements the AMDGPU specific subclass of TargetSubtarget.
12//
13//===----------------------------------------------------------------------===//
14
15#include "AMDGPUSubtarget.h"
16
17using namespace llvm;
18
19#define GET_SUBTARGETINFO_ENUM
20#define GET_SUBTARGETINFO_TARGET_DESC
21#define GET_SUBTARGETINFO_CTOR
22#include "AMDGPUGenSubtargetInfo.inc"
23
24AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
25 AMDGPUGenSubtargetInfo(TT, CPU, FS), DumpCode(false) {
26 InstrItins = getInstrItineraryForCPU(CPU);
27
Tom Stellard75aadc22012-12-11 21:25:42 +000028 // Default card
29 StringRef GPU = CPU;
30 Is64bit = false;
31 DefaultSize[0] = 64;
32 DefaultSize[1] = 1;
33 DefaultSize[2] = 1;
Vincent Lejeunec2991642013-04-30 00:13:39 +000034 HasVertexCache = false;
Tom Stellard3498e4f2013-06-07 20:28:55 +000035 TexVTXClauseSize = 0;
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000036 Gen = AMDGPUSubtarget::R600;
37 FP64 = false;
38 CaymanISA = false;
Tom Stellarded0ceec2013-10-10 17:11:12 +000039 EnableIRStructurizer = false;
Tom Stellard783893a2013-11-18 19:43:33 +000040 EnableIfCvt = true;
Tom Stellard75aadc22012-12-11 21:25:42 +000041 ParseSubtargetFeatures(GPU, FS);
42 DevName = GPU;
Tom Stellard75aadc22012-12-11 21:25:42 +000043}
44
Tom Stellard75aadc22012-12-11 21:25:42 +000045bool
46AMDGPUSubtarget::is64bit() const {
47 return Is64bit;
48}
49bool
Vincent Lejeunec2991642013-04-30 00:13:39 +000050AMDGPUSubtarget::hasVertexCache() const {
51 return HasVertexCache;
52}
Vincent Lejeunef9f4e1e2013-05-17 16:49:55 +000053short
54AMDGPUSubtarget::getTexVTXClauseSize() const {
55 return TexVTXClauseSize;
56}
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000057enum AMDGPUSubtarget::Generation
58AMDGPUSubtarget::getGeneration() const {
59 return Gen;
60}
61bool
62AMDGPUSubtarget::hasHWFP64() const {
63 return FP64;
64}
65bool
66AMDGPUSubtarget::hasCaymanISA() const {
67 return CaymanISA;
68}
Vincent Lejeunec2991642013-04-30 00:13:39 +000069bool
Tom Stellarded0ceec2013-10-10 17:11:12 +000070AMDGPUSubtarget::IsIRStructurizerEnabled() const {
71 return EnableIRStructurizer;
72}
73bool
Tom Stellard783893a2013-11-18 19:43:33 +000074AMDGPUSubtarget::isIfCvtEnabled() const {
75 return EnableIfCvt;
76}
77bool
Tom Stellard75aadc22012-12-11 21:25:42 +000078AMDGPUSubtarget::isTargetELF() const {
79 return false;
80}
81size_t
82AMDGPUSubtarget::getDefaultSize(uint32_t dim) const {
83 if (dim > 3) {
84 return 1;
85 } else {
86 return DefaultSize[dim];
87 }
88}
89
90std::string
91AMDGPUSubtarget::getDataLayout() const {
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000092 std::string DataLayout = std::string(
93 "e"
94 "-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32"
95 "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128"
96 "-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048"
97 "-n32:64"
98 );
99
100 if (hasHWFP64()) {
101 DataLayout.append("-f64:64:64");
102 }
103
104 if (is64bit()) {
105 DataLayout.append("-p:64:64:64");
106 } else {
107 DataLayout.append("-p:32:32:32");
108 }
109
Tom Stellardfd155822013-08-26 15:05:36 +0000110 if (Gen >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
111 DataLayout.append("-p3:32:32:32");
112 }
113
Tom Stellarda6c6e1b2013-06-07 20:37:48 +0000114 return DataLayout;
Tom Stellard75aadc22012-12-11 21:25:42 +0000115}
116
117std::string
118AMDGPUSubtarget::getDeviceName() const {
119 return DevName;
120}