Matt Arsenault | 7d5e2cb | 2014-07-13 02:46:17 +0000 | [diff] [blame] | 1 | ; RUN: llc -verify-machineinstrs -march=r600 -mcpu=SI -mattr=-promote-alloca < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI %s |
| 2 | ; RUN: llc -verify-machineinstrs -march=r600 -mcpu=SI -mattr=+promote-alloca < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI %s |
Matt Arsenault | a98cd6a | 2013-12-19 05:32:55 +0000 | [diff] [blame] | 3 | |
| 4 | declare i32 @llvm.SI.tid() nounwind readnone |
| 5 | declare void @llvm.AMDGPU.barrier.local() nounwind noduplicate |
| 6 | |
| 7 | ; The required pointer calculations for the alloca'd actually requires |
| 8 | ; an add and won't be folded into the addressing, which fails with a |
| 9 | ; 64-bit pointer add. This should work since private pointers should |
| 10 | ; be 32-bits. |
| 11 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame^] | 12 | ; SI-LABEL: {{^}}test_private_array_ptr_calc: |
Matt Arsenault | 7d5e2cb | 2014-07-13 02:46:17 +0000 | [diff] [blame] | 13 | |
Tom Stellard | b02094e | 2014-07-21 15:45:01 +0000 | [diff] [blame] | 14 | ; FIXME: We end up with zero argument for ADD, because |
| 15 | ; SIRegisterInfo::eliminateFrameIndex() blindly replaces the frame index |
| 16 | ; with the appropriate offset. We should fold this into the store. |
| 17 | ; SI-ALLOCA: V_ADD_I32_e32 [[PTRREG:v[0-9]+]], 0, v{{[0-9]+}} |
Tom Stellard | 229d5e6 | 2014-08-05 14:48:12 +0000 | [diff] [blame] | 18 | ; SI-ALLOCA: BUFFER_STORE_DWORD {{v[0-9]+}}, [[PTRREG]], s[{{[0-9]+:[0-9]+}}] |
Tom Stellard | 880a80a | 2014-06-17 16:53:14 +0000 | [diff] [blame] | 19 | ; |
| 20 | ; FIXME: The AMDGPUPromoteAlloca pass should be able to convert this |
| 21 | ; alloca to a vector. It currently fails because it does not know how |
| 22 | ; to interpret: |
| 23 | ; getelementptr [4 x i32]* %alloca, i32 1, i32 %b |
Matt Arsenault | 7d5e2cb | 2014-07-13 02:46:17 +0000 | [diff] [blame] | 24 | |
Matt Arsenault | 7b46a59 | 2014-09-06 20:44:41 +0000 | [diff] [blame] | 25 | ; SI-PROMOTE: V_ADD_I32_e32 [[PTRREG:v[0-9]+]], 16 |
| 26 | ; SI-PROMOTE: DS_WRITE_B32 [[PTRREG]] |
Matt Arsenault | a98cd6a | 2013-12-19 05:32:55 +0000 | [diff] [blame] | 27 | define void @test_private_array_ptr_calc(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %inA, i32 addrspace(1)* noalias %inB) { |
| 28 | %alloca = alloca [4 x i32], i32 4, align 16 |
| 29 | %tid = call i32 @llvm.SI.tid() readnone |
| 30 | %a_ptr = getelementptr i32 addrspace(1)* %inA, i32 %tid |
| 31 | %b_ptr = getelementptr i32 addrspace(1)* %inB, i32 %tid |
| 32 | %a = load i32 addrspace(1)* %a_ptr |
| 33 | %b = load i32 addrspace(1)* %b_ptr |
| 34 | %result = add i32 %a, %b |
| 35 | %alloca_ptr = getelementptr [4 x i32]* %alloca, i32 1, i32 %b |
| 36 | store i32 %result, i32* %alloca_ptr, align 4 |
| 37 | ; Dummy call |
| 38 | call void @llvm.AMDGPU.barrier.local() nounwind noduplicate |
| 39 | %reload = load i32* %alloca_ptr, align 4 |
| 40 | %out_ptr = getelementptr i32 addrspace(1)* %out, i32 %tid |
| 41 | store i32 %reload, i32 addrspace(1)* %out_ptr, align 4 |
| 42 | ret void |
| 43 | } |
| 44 | |