Matt Arsenault | 8333e43 | 2014-06-10 19:18:24 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s |
| 2 | |
| 3 | declare i64 @llvm.ctpop.i64(i64) nounwind readnone |
| 4 | declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>) nounwind readnone |
| 5 | declare <4 x i64> @llvm.ctpop.v4i64(<4 x i64>) nounwind readnone |
| 6 | declare <8 x i64> @llvm.ctpop.v8i64(<8 x i64>) nounwind readnone |
| 7 | declare <16 x i64> @llvm.ctpop.v16i64(<16 x i64>) nounwind readnone |
| 8 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame^] | 9 | ; FUNC-LABEL: {{^}}s_ctpop_i64: |
Matt Arsenault | c10853f | 2014-08-06 00:29:43 +0000 | [diff] [blame] | 10 | ; SI: S_LOAD_DWORDX2 [[SVAL:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0xb |
Matt Arsenault | 8333e43 | 2014-06-10 19:18:24 +0000 | [diff] [blame] | 11 | ; SI: S_BCNT1_I32_B64 [[SRESULT:s[0-9]+]], [[SVAL]] |
| 12 | ; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] |
| 13 | ; SI: BUFFER_STORE_DWORD [[VRESULT]], |
| 14 | ; SI: S_ENDPGM |
| 15 | define void @s_ctpop_i64(i32 addrspace(1)* noalias %out, i64 %val) nounwind { |
| 16 | %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone |
| 17 | %truncctpop = trunc i64 %ctpop to i32 |
| 18 | store i32 %truncctpop, i32 addrspace(1)* %out, align 4 |
| 19 | ret void |
| 20 | } |
| 21 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame^] | 22 | ; FUNC-LABEL: {{^}}v_ctpop_i64: |
Matt Arsenault | 8333e43 | 2014-06-10 19:18:24 +0000 | [diff] [blame] | 23 | ; SI: BUFFER_LOAD_DWORDX2 v{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, |
| 24 | ; SI: V_MOV_B32_e32 [[VZERO:v[0-9]+]], 0 |
| 25 | ; SI: V_BCNT_U32_B32_e32 [[MIDRESULT:v[0-9]+]], v[[LOVAL]], [[VZERO]] |
| 26 | ; SI-NEXT: V_BCNT_U32_B32_e32 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]] |
| 27 | ; SI: BUFFER_STORE_DWORD [[RESULT]], |
| 28 | ; SI: S_ENDPGM |
| 29 | define void @v_ctpop_i64(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind { |
| 30 | %val = load i64 addrspace(1)* %in, align 8 |
| 31 | %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone |
| 32 | %truncctpop = trunc i64 %ctpop to i32 |
| 33 | store i32 %truncctpop, i32 addrspace(1)* %out, align 4 |
| 34 | ret void |
| 35 | } |
| 36 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame^] | 37 | ; FUNC-LABEL: {{^}}s_ctpop_v2i64: |
Matt Arsenault | 8333e43 | 2014-06-10 19:18:24 +0000 | [diff] [blame] | 38 | ; SI: S_BCNT1_I32_B64 |
| 39 | ; SI: S_BCNT1_I32_B64 |
| 40 | ; SI: S_ENDPGM |
| 41 | define void @s_ctpop_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> %val) nounwind { |
| 42 | %ctpop = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %val) nounwind readnone |
| 43 | %truncctpop = trunc <2 x i64> %ctpop to <2 x i32> |
| 44 | store <2 x i32> %truncctpop, <2 x i32> addrspace(1)* %out, align 8 |
| 45 | ret void |
| 46 | } |
| 47 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame^] | 48 | ; FUNC-LABEL: {{^}}s_ctpop_v4i64: |
Matt Arsenault | 8333e43 | 2014-06-10 19:18:24 +0000 | [diff] [blame] | 49 | ; SI: S_BCNT1_I32_B64 |
| 50 | ; SI: S_BCNT1_I32_B64 |
| 51 | ; SI: S_BCNT1_I32_B64 |
| 52 | ; SI: S_BCNT1_I32_B64 |
| 53 | ; SI: S_ENDPGM |
| 54 | define void @s_ctpop_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> %val) nounwind { |
| 55 | %ctpop = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %val) nounwind readnone |
| 56 | %truncctpop = trunc <4 x i64> %ctpop to <4 x i32> |
| 57 | store <4 x i32> %truncctpop, <4 x i32> addrspace(1)* %out, align 16 |
| 58 | ret void |
| 59 | } |
| 60 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame^] | 61 | ; FUNC-LABEL: {{^}}v_ctpop_v2i64: |
Matt Arsenault | 8333e43 | 2014-06-10 19:18:24 +0000 | [diff] [blame] | 62 | ; SI: V_BCNT_U32_B32 |
| 63 | ; SI: V_BCNT_U32_B32 |
| 64 | ; SI: V_BCNT_U32_B32 |
| 65 | ; SI: V_BCNT_U32_B32 |
| 66 | ; SI: S_ENDPGM |
| 67 | define void @v_ctpop_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %in) nounwind { |
| 68 | %val = load <2 x i64> addrspace(1)* %in, align 16 |
| 69 | %ctpop = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %val) nounwind readnone |
| 70 | %truncctpop = trunc <2 x i64> %ctpop to <2 x i32> |
| 71 | store <2 x i32> %truncctpop, <2 x i32> addrspace(1)* %out, align 8 |
| 72 | ret void |
| 73 | } |
| 74 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame^] | 75 | ; FUNC-LABEL: {{^}}v_ctpop_v4i64: |
Matt Arsenault | 8333e43 | 2014-06-10 19:18:24 +0000 | [diff] [blame] | 76 | ; SI: V_BCNT_U32_B32 |
| 77 | ; SI: V_BCNT_U32_B32 |
| 78 | ; SI: V_BCNT_U32_B32 |
| 79 | ; SI: V_BCNT_U32_B32 |
| 80 | ; SI: V_BCNT_U32_B32 |
| 81 | ; SI: V_BCNT_U32_B32 |
| 82 | ; SI: V_BCNT_U32_B32 |
| 83 | ; SI: V_BCNT_U32_B32 |
| 84 | ; SI: S_ENDPGM |
| 85 | define void @v_ctpop_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> addrspace(1)* noalias %in) nounwind { |
| 86 | %val = load <4 x i64> addrspace(1)* %in, align 32 |
| 87 | %ctpop = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %val) nounwind readnone |
| 88 | %truncctpop = trunc <4 x i64> %ctpop to <4 x i32> |
| 89 | store <4 x i32> %truncctpop, <4 x i32> addrspace(1)* %out, align 16 |
| 90 | ret void |
| 91 | } |
Tom Stellard | ae4c9e7 | 2014-06-20 17:06:11 +0000 | [diff] [blame] | 92 | |
| 93 | ; FIXME: We currently disallow SALU instructions in all branches, |
| 94 | ; but there are some cases when the should be allowed. |
| 95 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame^] | 96 | ; FUNC-LABEL: {{^}}ctpop_i64_in_br: |
Tom Stellard | 744b99b | 2014-09-24 01:33:28 +0000 | [diff] [blame] | 97 | ; SI: S_LOAD_DWORDX2 s{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0xd |
| 98 | ; SI: S_BCNT1_I32_B64 [[RESULT:s[0-9]+]], {{s\[}}[[LOVAL]]:[[HIVAL]]{{\]}} |
| 99 | ; SI: V_MOV_B32_e32 v[[VLO:[0-9]+]], [[RESULT]] |
| 100 | ; SI: V_MOV_B32_e32 v[[VHI:[0-9]+]], s[[HIVAL]] |
| 101 | ; SI: BUFFER_STORE_DWORDX2 {{v\[}}[[VLO]]:[[VHI]]{{\]}} |
Tom Stellard | ae4c9e7 | 2014-06-20 17:06:11 +0000 | [diff] [blame] | 102 | ; SI: S_ENDPGM |
Tom Stellard | 744b99b | 2014-09-24 01:33:28 +0000 | [diff] [blame] | 103 | define void @ctpop_i64_in_br(i64 addrspace(1)* %out, i64 addrspace(1)* %in, i64 %ctpop_arg, i32 %cond) { |
Tom Stellard | ae4c9e7 | 2014-06-20 17:06:11 +0000 | [diff] [blame] | 104 | entry: |
Tom Stellard | 744b99b | 2014-09-24 01:33:28 +0000 | [diff] [blame] | 105 | %tmp0 = icmp eq i32 %cond, 0 |
| 106 | br i1 %tmp0, label %if, label %else |
Tom Stellard | ae4c9e7 | 2014-06-20 17:06:11 +0000 | [diff] [blame] | 107 | |
| 108 | if: |
Tom Stellard | 744b99b | 2014-09-24 01:33:28 +0000 | [diff] [blame] | 109 | %tmp2 = call i64 @llvm.ctpop.i64(i64 %ctpop_arg) |
Tom Stellard | ae4c9e7 | 2014-06-20 17:06:11 +0000 | [diff] [blame] | 110 | br label %endif |
| 111 | |
| 112 | else: |
Tom Stellard | 744b99b | 2014-09-24 01:33:28 +0000 | [diff] [blame] | 113 | %tmp3 = getelementptr i64 addrspace(1)* %in, i32 1 |
| 114 | %tmp4 = load i64 addrspace(1)* %tmp3 |
Tom Stellard | ae4c9e7 | 2014-06-20 17:06:11 +0000 | [diff] [blame] | 115 | br label %endif |
| 116 | |
| 117 | endif: |
Tom Stellard | 744b99b | 2014-09-24 01:33:28 +0000 | [diff] [blame] | 118 | %tmp5 = phi i64 [%tmp2, %if], [%tmp4, %else] |
| 119 | store i64 %tmp5, i64 addrspace(1)* %out |
Tom Stellard | ae4c9e7 | 2014-06-20 17:06:11 +0000 | [diff] [blame] | 120 | ret void |
| 121 | } |