blob: bd80414ba6d1eb8923010b43eacc4959807d25fd [file] [log] [blame]
Matt Arsenault9215b172014-08-03 05:27:14 +00001; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI %s
2
3; Make sure there isn't an extra space between the instruction name and first operands.
4
Tom Stellard79243d92014-10-01 17:15:17 +00005; SI-LABEL: {{^}}add_f32:
Matt Arsenault9215b172014-08-03 05:27:14 +00006; SI-DAG: S_LOAD_DWORD [[SREGA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
7; SI-DAG: S_LOAD_DWORD [[SREGB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
8; SI: V_MOV_B32_e32 [[VREGB:v[0-9]+]], [[SREGB]]
9; SI: V_ADD_F32_e32 [[RESULT:v[0-9]+]], [[SREGA]], [[VREGB]]
10; SI: BUFFER_STORE_DWORD [[RESULT]],
11define void @add_f32(float addrspace(1)* %out, float %a, float %b) {
12 %result = fadd float %a, %b
13 store float %result, float addrspace(1)* %out
14 ret void
15}