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Chris Lattnera08186a2009-06-19 00:47:59 +00001//===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file includes code for rendering MCInst instances as AT&T-style
11// assembly.
12//
13//===----------------------------------------------------------------------===//
14
15#define DEBUG_TYPE "asm-printer"
Chris Lattner1cbd3de2009-09-13 19:30:11 +000016#include "X86ATTInstPrinter.h"
Chris Lattner7a05e6d2010-08-28 20:42:31 +000017#include "X86InstComments.h"
Chris Lattnera08186a2009-06-19 00:47:59 +000018#include "llvm/MC/MCInst.h"
Chris Lattner7b26fce2009-08-22 20:48:53 +000019#include "llvm/MC/MCAsmInfo.h"
Daniel Dunbar73da11e2009-08-31 08:08:38 +000020#include "llvm/MC/MCExpr.h"
Torok Edwin6dd27302009-07-08 18:01:40 +000021#include "llvm/Support/ErrorHandling.h"
Chris Lattner482bf692010-02-10 00:10:18 +000022#include "llvm/Support/Format.h"
David Greenea31f96c2009-07-14 20:18:05 +000023#include "llvm/Support/FormattedStream.h"
Shantonu Sen7ba874b2009-09-18 20:35:59 +000024#include "X86GenInstrNames.inc"
Chris Lattnera08186a2009-06-19 00:47:59 +000025using namespace llvm;
26
Chris Lattner8d284c72009-06-19 23:59:57 +000027// Include the auto-generated portion of the assembly writer.
28#define MachineInstr MCInst
Chris Lattnerb1913c42010-02-11 22:57:32 +000029#define GET_INSTRUCTION_NAME
Chris Lattner8d284c72009-06-19 23:59:57 +000030#include "X86GenAsmWriter.inc"
31#undef MachineInstr
32
Chris Lattner70129162010-04-04 05:04:31 +000033void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) {
34 printInstruction(MI, OS);
Chris Lattner7a05e6d2010-08-28 20:42:31 +000035
36 // If verbose assembly is enabled, we can print some informative comments.
37 if (CommentStream)
38 EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
Chris Lattner76c564b2010-04-04 04:47:45 +000039}
Chris Lattnerb1913c42010-02-11 22:57:32 +000040StringRef X86ATTInstPrinter::getOpcodeName(unsigned Opcode) const {
41 return getInstructionName(Opcode);
42}
43
Chris Lattner6d31b432009-09-14 01:49:26 +000044
Chris Lattner76c564b2010-04-04 04:47:45 +000045void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
46 raw_ostream &O) {
Chris Lattnera0022a72009-06-20 07:03:18 +000047 switch (MI->getOperand(Op).getImm()) {
Chris Lattner76c564b2010-04-04 04:47:45 +000048 default: assert(0 && "Invalid ssecc argument!");
Chris Lattner46820152009-06-20 00:49:26 +000049 case 0: O << "eq"; break;
50 case 1: O << "lt"; break;
51 case 2: O << "le"; break;
52 case 3: O << "unord"; break;
53 case 4: O << "neq"; break;
54 case 5: O << "nlt"; break;
55 case 6: O << "nle"; break;
56 case 7: O << "ord"; break;
Chris Lattner8d284c72009-06-19 23:59:57 +000057 }
58}
59
Chris Lattner9c211962009-06-20 19:34:09 +000060/// print_pcrel_imm - This is used to print an immediate value that ends up
Chris Lattner6211d7b2009-12-22 00:44:05 +000061/// being encoded as a pc-relative value (e.g. for jumps and calls). These
62/// print slightly differently than normal immediates. For example, a $ is not
63/// emitted.
Chris Lattner76c564b2010-04-04 04:47:45 +000064void X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo,
65 raw_ostream &O) {
Chris Lattner9c211962009-06-20 19:34:09 +000066 const MCOperand &Op = MI->getOperand(OpNo);
Chris Lattner9c211962009-06-20 19:34:09 +000067 if (Op.isImm())
Chris Lattner6211d7b2009-12-22 00:44:05 +000068 // Print this as a signed 32-bit value.
69 O << (int)Op.getImm();
Chris Lattneraa398f52009-09-14 01:34:40 +000070 else {
71 assert(Op.isExpr() && "unknown pcrel immediate operand");
Chris Lattnerc8f77172010-01-18 00:37:40 +000072 O << *Op.getExpr();
Chris Lattneraa398f52009-09-14 01:34:40 +000073 }
Chris Lattner9c211962009-06-20 19:34:09 +000074}
75
Chris Lattner76c564b2010-04-04 04:47:45 +000076void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
77 raw_ostream &O) {
Chris Lattner46820152009-06-20 00:49:26 +000078 const MCOperand &Op = MI->getOperand(OpNo);
79 if (Op.isReg()) {
Chris Lattner56950c62009-09-13 20:15:16 +000080 O << '%' << getRegisterName(Op.getReg());
Chris Lattner46820152009-06-20 00:49:26 +000081 } else if (Op.isImm()) {
Chris Lattner24083062009-09-09 00:40:31 +000082 O << '$' << Op.getImm();
Chris Lattner482bf692010-02-10 00:10:18 +000083
84 if (CommentStream && (Op.getImm() > 255 || Op.getImm() < -256))
Dan Gohman12995ba2010-02-17 00:37:20 +000085 *CommentStream << format("imm = 0x%llX\n", (long long)Op.getImm());
Chris Lattner482bf692010-02-10 00:10:18 +000086
Chris Lattneraa398f52009-09-14 01:34:40 +000087 } else {
88 assert(Op.isExpr() && "unknown operand kind in printOperand");
Chris Lattnerc8f77172010-01-18 00:37:40 +000089 O << '$' << *Op.getExpr();
Chris Lattner46820152009-06-20 00:49:26 +000090 }
Chris Lattner8d284c72009-06-19 23:59:57 +000091}
92
Chris Lattnerf4693072010-07-08 23:46:44 +000093void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
94 raw_ostream &O) {
Chris Lattner46820152009-06-20 00:49:26 +000095 const MCOperand &BaseReg = MI->getOperand(Op);
96 const MCOperand &IndexReg = MI->getOperand(Op+2);
97 const MCOperand &DispSpec = MI->getOperand(Op+3);
Chris Lattnerf4693072010-07-08 23:46:44 +000098 const MCOperand &SegReg = MI->getOperand(Op+4);
99
100 // If this has a segment register, print it.
101 if (SegReg.getReg()) {
102 printOperand(MI, Op+4, O);
103 O << ':';
104 }
Chris Lattner46820152009-06-20 00:49:26 +0000105
Chris Lattner46820152009-06-20 00:49:26 +0000106 if (DispSpec.isImm()) {
107 int64_t DispVal = DispSpec.getImm();
108 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
109 O << DispVal;
110 } else {
Chris Lattner24083062009-09-09 00:40:31 +0000111 assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
Chris Lattnerc8f77172010-01-18 00:37:40 +0000112 O << *DispSpec.getExpr();
Chris Lattner46820152009-06-20 00:49:26 +0000113 }
114
115 if (IndexReg.getReg() || BaseReg.getReg()) {
Chris Lattner46820152009-06-20 00:49:26 +0000116 O << '(';
117 if (BaseReg.getReg())
Chris Lattner76c564b2010-04-04 04:47:45 +0000118 printOperand(MI, Op, O);
Chris Lattner46820152009-06-20 00:49:26 +0000119
120 if (IndexReg.getReg()) {
121 O << ',';
Chris Lattner76c564b2010-04-04 04:47:45 +0000122 printOperand(MI, Op+2, O);
Chris Lattnerb4b5c102009-06-20 08:13:12 +0000123 unsigned ScaleVal = MI->getOperand(Op+1).getImm();
124 if (ScaleVal != 1)
Chris Lattner46820152009-06-20 00:49:26 +0000125 O << ',' << ScaleVal;
126 }
127 O << ')';
128 }
Chris Lattner8d284c72009-06-19 23:59:57 +0000129}