blob: ea9754a390b6defcadb8c53da4d1b5fa00d07a2a [file] [log] [blame]
Matt Arsenault0e3d3892015-11-30 21:15:53 +00001; RUN: llc -march=amdgcn -mcpu=bonaire < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=ALL %s
Matt Arsenault7aad8fd2017-01-24 22:02:15 +00002; RUN: llc -march=amdgcn -mcpu=carrizo -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=ALL %s
Matt Arsenault0e3d3892015-11-30 21:15:53 +00003
4; ALL-LABEL: {{^}}large_alloca_pixel_shader:
Matt Arsenaulte8ed8e52016-05-11 00:28:54 +00005; GCN-DAG: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
6; GCN-DAG: s_mov_b32 s9, SCRATCH_RSRC_DWORD1
7; GCN-DAG: s_mov_b32 s10, -1
Marek Olsake93f6d62016-06-13 16:05:57 +00008; CI-DAG: s_mov_b32 s11, 0xe8f000
9; VI-DAG: s_mov_b32 s11, 0xe80000
Matt Arsenault0e3d3892015-11-30 21:15:53 +000010
Tom Stellardf110f8f2016-04-14 16:27:03 +000011; GCN: buffer_store_dword {{v[0-9]+}}, {{v[0-9]+}}, s[8:11], s0 offen
12; GCN: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, s[8:11], s0 offen
Matt Arsenault0e3d3892015-11-30 21:15:53 +000013
14; ALL: ; ScratchSize: 32772
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +000015define amdgpu_ps void @large_alloca_pixel_shader(i32 %x, i32 %y) #0 {
Matt Arsenault0e3d3892015-11-30 21:15:53 +000016 %large = alloca [8192 x i32], align 4
17 %gep = getelementptr [8192 x i32], [8192 x i32]* %large, i32 0, i32 8191
18 store volatile i32 %x, i32* %gep
19 %gep1 = getelementptr [8192 x i32], [8192 x i32]* %large, i32 0, i32 %y
20 %val = load volatile i32, i32* %gep1
21 store volatile i32 %val, i32 addrspace(1)* undef
22 ret void
23}
24
25; ALL-LABEL: {{^}}large_alloca_pixel_shader_inreg:
Matt Arsenaulte8ed8e52016-05-11 00:28:54 +000026; GCN-DAG: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
27; GCN-DAG: s_mov_b32 s9, SCRATCH_RSRC_DWORD1
28; GCN-DAG: s_mov_b32 s10, -1
Marek Olsake93f6d62016-06-13 16:05:57 +000029; CI-DAG: s_mov_b32 s11, 0xe8f000
30; VI-DAG: s_mov_b32 s11, 0xe80000
Matt Arsenault0e3d3892015-11-30 21:15:53 +000031
Tom Stellardf110f8f2016-04-14 16:27:03 +000032; GCN: buffer_store_dword {{v[0-9]+}}, {{v[0-9]+}}, s[8:11], s2 offen
33; GCN: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, s[8:11], s2 offen
Matt Arsenault0e3d3892015-11-30 21:15:53 +000034
35; ALL: ; ScratchSize: 32772
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +000036define amdgpu_ps void @large_alloca_pixel_shader_inreg(i32 inreg %x, i32 inreg %y) #0 {
Matt Arsenault0e3d3892015-11-30 21:15:53 +000037 %large = alloca [8192 x i32], align 4
38 %gep = getelementptr [8192 x i32], [8192 x i32]* %large, i32 0, i32 8191
39 store volatile i32 %x, i32* %gep
40 %gep1 = getelementptr [8192 x i32], [8192 x i32]* %large, i32 0, i32 %y
41 %val = load volatile i32, i32* %gep1
42 store volatile i32 %val, i32 addrspace(1)* undef
43 ret void
44}
45
46attributes #0 = { nounwind }