| Jyotsna Verma | 7ab68fb | 2013-02-04 15:52:56 +0000 | [diff] [blame^] | 1 | ; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s |
| 2 | ; CHECK: word |
| 3 | ; CHECK: combine(#0 |
| 4 | |
| 5 | define void @word(i32* nocapture %a) nounwind { |
| 6 | entry: |
| 7 | %0 = load i32* %a, align 4, !tbaa !0 |
| 8 | %1 = zext i32 %0 to i64 |
| 9 | %add.ptr = getelementptr inbounds i32* %a, i32 1 |
| 10 | %2 = load i32* %add.ptr, align 4, !tbaa !0 |
| 11 | %3 = zext i32 %2 to i64 |
| 12 | %4 = shl nuw i64 %3, 32 |
| 13 | %ins = or i64 %4, %1 |
| 14 | tail call void @bar(i64 %ins) nounwind |
| 15 | ret void |
| 16 | } |
| 17 | |
| 18 | declare void @bar(i64) |
| 19 | |
| 20 | ; CHECK: halfword |
| 21 | ; CHECK: combine(#0 |
| 22 | |
| 23 | define void @halfword(i16* nocapture %a) nounwind { |
| 24 | entry: |
| 25 | %0 = load i16* %a, align 2, !tbaa !3 |
| 26 | %1 = zext i16 %0 to i64 |
| 27 | %add.ptr = getelementptr inbounds i16* %a, i32 1 |
| 28 | %2 = load i16* %add.ptr, align 2, !tbaa !3 |
| 29 | %3 = zext i16 %2 to i64 |
| 30 | %4 = shl nuw nsw i64 %3, 16 |
| 31 | %ins = or i64 %4, %1 |
| 32 | tail call void @bar(i64 %ins) nounwind |
| 33 | ret void |
| 34 | } |
| 35 | |
| 36 | ; CHECK: byte |
| 37 | ; CHECK: combine(#0 |
| 38 | |
| 39 | define void @byte(i8* nocapture %a) nounwind { |
| 40 | entry: |
| 41 | %0 = load i8* %a, align 1, !tbaa !1 |
| 42 | %1 = zext i8 %0 to i64 |
| 43 | %add.ptr = getelementptr inbounds i8* %a, i32 1 |
| 44 | %2 = load i8* %add.ptr, align 1, !tbaa !1 |
| 45 | %3 = zext i8 %2 to i64 |
| 46 | %4 = shl nuw nsw i64 %3, 8 |
| 47 | %ins = or i64 %4, %1 |
| 48 | tail call void @bar(i64 %ins) nounwind |
| 49 | ret void |
| 50 | } |
| 51 | |
| 52 | !0 = metadata !{metadata !"int", metadata !1} |
| 53 | !1 = metadata !{metadata !"omnipotent char", metadata !2} |
| 54 | !2 = metadata !{metadata !"Simple C/C++ TBAA"} |
| 55 | !3 = metadata !{metadata !"short", metadata !1} |