Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 7c0c0c0501806ce287dd2494b51f76f7a3ee5737 / . / llvm / test / CodeGen / ARM / fast-isel-fold.ll
blob: 37e93c0a70188661800e821b178f6b5628738366 [file] [log] [blame]
Mehdi Amini945a6602015-02-27 18:32:11 +0000[diff] [blame]1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB
Chad Rosierc8cfd3a2011-11-13 02:23:59 +0000[diff] [blame]4
5@a = global i8 1, align 1
6@b = global i16 2, align 2
7
8define void @t1() nounwind uwtable ssp {
9; ARM: t1
10; ARM: ldrb
11; ARM-NOT: uxtb
JF Bastien06ce03d2013-06-07 20:10:37 +0000[diff] [blame]12; ARM-NOT: and{{.*}}, #255
Chad Rosierc8cfd3a2011-11-13 02:23:59 +0000[diff] [blame]13; THUMB: t1
14; THUMB: ldrb
15; THUMB-NOT: uxtb
JF Bastien06ce03d2013-06-07 20:10:37 +0000[diff] [blame]16; THUMB-NOT: and{{.*}}, #255
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]17 %1 = load i8, i8* @a, align 1
Chad Rosierc8cfd3a2011-11-13 02:23:59 +0000[diff] [blame]18 call void @foo1(i8 zeroext %1)
19 ret void
20}
21
22define void @t2() nounwind uwtable ssp {
23; ARM: t2
24; ARM: ldrh
25; ARM-NOT: uxth
26; THUMB: t2
27; THUMB: ldrh
28; THUMB-NOT: uxth
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]29 %1 = load i16, i16* @b, align 2
Chad Rosierc8cfd3a2011-11-13 02:23:59 +0000[diff] [blame]30 call void @foo2(i16 zeroext %1)
31 ret void
32}
33
34declare void @foo1(i8 zeroext)
35declare void @foo2(i16 zeroext)
36
37define i32 @t3() nounwind uwtable ssp {
38; ARM: t3
39; ARM: ldrb
40; ARM-NOT: uxtb
JF Bastien06ce03d2013-06-07 20:10:37 +0000[diff] [blame]41; ARM-NOT: and{{.*}}, #255
Chad Rosierc8cfd3a2011-11-13 02:23:59 +0000[diff] [blame]42; THUMB: t3
43; THUMB: ldrb
44; THUMB-NOT: uxtb
JF Bastien06ce03d2013-06-07 20:10:37 +0000[diff] [blame]45; THUMB-NOT: and{{.*}}, #255
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]46 %1 = load i8, i8* @a, align 1
Chad Rosierc8cfd3a2011-11-13 02:23:59 +0000[diff] [blame]47 %2 = zext i8 %1 to i32
48 ret i32 %2
49}
50
51define i32 @t4() nounwind uwtable ssp {
52; ARM: t4
53; ARM: ldrh
54; ARM-NOT: uxth
55; THUMB: t4
56; THUMB: ldrh
57; THUMB-NOT: uxth
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]58 %1 = load i16, i16* @b, align 2
Chad Rosierc8cfd3a2011-11-13 02:23:59 +0000[diff] [blame]59 %2 = zext i16 %1 to i32
60 ret i32 %2
61}
62
63define i32 @t5() nounwind uwtable ssp {
64; ARM: t5
65; ARM: ldrsh
66; ARM-NOT: sxth
67; THUMB: t5
68; THUMB: ldrsh
69; THUMB-NOT: sxth
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]70 %1 = load i16, i16* @b, align 2
Chad Rosierc8cfd3a2011-11-13 02:23:59 +0000[diff] [blame]71 %2 = sext i16 %1 to i32
72 ret i32 %2
73}
74
75define i32 @t6() nounwind uwtable ssp {
76; ARM: t6
77; ARM: ldrsb
78; ARM-NOT: sxtb
79; THUMB: t6
80; THUMB: ldrsb
81; THUMB-NOT: sxtb
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]82 %1 = load i8, i8* @a, align 2
Chad Rosierc8cfd3a2011-11-13 02:23:59 +0000[diff] [blame]83 %2 = sext i8 %1 to i32
84 ret i32 %2
85}