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gerrit-public.fairphone.software / toolchain / llvm-project / 7ed6b2f414a2760ebc6510b059bb1db096d677c2 / . / llvm / test / CodeGen / AMDGPU / sminmax.ll
blob: 3dd49aafa4d31e3531b1cf14596411c5597a7b2c [file] [log] [blame]
Marek Olsak7ed6b2f2015-11-25 21:22:45 +0000[diff] [blame^]1; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
3
4; FUNC-LABEL: {{^}}s_abs_i32:
5; GCN: s_abs_i32
6; GCN: s_add_i32
7define void @s_abs_i32(i32 addrspace(1)* %out, i32 %val) nounwind {
8 %neg = sub i32 0, %val
9 %cond = icmp sgt i32 %val, %neg
10 %res = select i1 %cond, i32 %val, i32 %neg
11 %res2 = add i32 %res, 2
12 store i32 %res2, i32 addrspace(1)* %out, align 4
13 ret void
14}
15
16; FUNC-LABEL: {{^}}v_abs_i32:
17; GCN: v_sub_i32_e32 [[NEG:v[0-9]+]], vcc, 0, [[SRC:v[0-9]+]]
18; GCN: v_max_i32_e32 {{v[0-9]+}}, [[NEG]], [[SRC]]
19; GCN: v_add_i32
20define void @v_abs_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %src) nounwind {
21 %val = load i32, i32 addrspace(1)* %src, align 4
22 %neg = sub i32 0, %val
23 %cond = icmp sgt i32 %val, %neg
24 %res = select i1 %cond, i32 %val, i32 %neg
25 %res2 = add i32 %res, 2
26 store i32 %res2, i32 addrspace(1)* %out, align 4
27 ret void
28}
29
30; FUNC-LABEL: {{^}}s_abs_v2i32:
31; TODO: this should use s_abs_i32
32; GCNX: s_abs_i32
33; GCNX: s_abs_i32
34; GCN: s_sub
35; GCN: s_sub
36; GCN-DAG: v_cmp_gt
37; GCN-DAG: v_cmp_gt
38; GCN-DAG: v_cndmask_b32
39; GCN-DAG: v_cndmask_b32
40; GCN: v_add_i32
41; GCN: v_add_i32
42define void @s_abs_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %val) nounwind {
43 %z0 = insertelement <2 x i32> undef, i32 0, i32 0
44 %z1 = insertelement <2 x i32> %z0, i32 0, i32 1
45 %t0 = insertelement <2 x i32> undef, i32 2, i32 0
46 %t1 = insertelement <2 x i32> %t0, i32 2, i32 1
47 %neg = sub <2 x i32> %z1, %val
48 %cond = icmp sgt <2 x i32> %val, %neg
49 %res = select <2 x i1> %cond, <2 x i32> %val, <2 x i32> %neg
50 %res2 = add <2 x i32> %res, %t1
51 store <2 x i32> %res2, <2 x i32> addrspace(1)* %out, align 4
52 ret void
53}
54
55; FUNC-LABEL: {{^}}v_abs_v2i32:
56; GCN: v_sub_i32_e32 [[NEG0:v[0-9]+]], vcc, 0, [[SRC0:v[0-9]+]]
57; GCN: v_sub_i32_e32 [[NEG1:v[0-9]+]], vcc, 0, [[SRC1:v[0-9]+]]
58; TODO: this should use v_max_i32
59; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG0]], [[SRC0]]
60; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG1]], [[SRC1]]
61; GCN-DAG: v_cmp_gt
62; GCN-DAG: v_cmp_gt
63; GCN-DAG: v_cndmask_b32
64; GCN-DAG: v_cndmask_b32
65; GCN: v_add_i32
66; GCN: v_add_i32
67define void @v_abs_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %src) nounwind {
68 %z0 = insertelement <2 x i32> undef, i32 0, i32 0
69 %z1 = insertelement <2 x i32> %z0, i32 0, i32 1
70 %t0 = insertelement <2 x i32> undef, i32 2, i32 0
71 %t1 = insertelement <2 x i32> %t0, i32 2, i32 1
72 %val = load <2 x i32>, <2 x i32> addrspace(1)* %src, align 4
73 %neg = sub <2 x i32> %z1, %val
74 %cond = icmp sgt <2 x i32> %val, %neg
75 %res = select <2 x i1> %cond, <2 x i32> %val, <2 x i32> %neg
76 %res2 = add <2 x i32> %res, %t1
77 store <2 x i32> %res2, <2 x i32> addrspace(1)* %out, align 4
78 ret void
79}
80
81; FUNC-LABEL: {{^}}s_abs_v4i32:
82; TODO: this should use s_abs_i32
83; GCNX: s_abs_i32
84; GCNX: s_abs_i32
85; GCNX: s_abs_i32
86; GCNX: s_abs_i32
87; GCN: s_sub
88; GCN: s_sub
89; GCN: s_sub
90; GCN: s_sub
91; GCN-DAG: v_cmp_gt
92; GCN-DAG: v_cmp_gt
93; GCN-DAG: v_cmp_gt
94; GCN-DAG: v_cmp_gt
95; GCN-DAG: v_cndmask_b32
96; GCN-DAG: v_cndmask_b32
97; GCN-DAG: v_cndmask_b32
98; GCN-DAG: v_cndmask_b32
99; GCN: v_add_i32
100; GCN: v_add_i32
101define void @s_abs_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> %val) nounwind {
102 %z0 = insertelement <4 x i32> undef, i32 0, i32 0
103 %z1 = insertelement <4 x i32> %z0, i32 0, i32 1
104 %z2 = insertelement <4 x i32> %z1, i32 0, i32 2
105 %z3 = insertelement <4 x i32> %z2, i32 0, i32 3
106 %t0 = insertelement <4 x i32> undef, i32 2, i32 0
107 %t1 = insertelement <4 x i32> %t0, i32 2, i32 1
108 %t2 = insertelement <4 x i32> %t1, i32 2, i32 2
109 %t3 = insertelement <4 x i32> %t2, i32 2, i32 3
110 %neg = sub <4 x i32> %z3, %val
111 %cond = icmp sgt <4 x i32> %val, %neg
112 %res = select <4 x i1> %cond, <4 x i32> %val, <4 x i32> %neg
113 %res2 = add <4 x i32> %res, %t3
114 store <4 x i32> %res2, <4 x i32> addrspace(1)* %out, align 4
115 ret void
116}
117
118; FUNC-LABEL: {{^}}v_abs_v4i32:
119; GCN: v_sub_i32_e32 [[NEG0:v[0-9]+]], vcc, 0, [[SRC0:v[0-9]+]]
120; GCN: v_sub_i32_e32 [[NEG1:v[0-9]+]], vcc, 0, [[SRC1:v[0-9]+]]
121; GCN: v_sub_i32_e32 [[NEG2:v[0-9]+]], vcc, 0, [[SRC2:v[0-9]+]]
122; GCN: v_sub_i32_e32 [[NEG3:v[0-9]+]], vcc, 0, [[SRC3:v[0-9]+]]
123; TODO: this should use v_max_i32
124; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG0]], [[SRC0]]
125; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG1]], [[SRC1]]
126; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG2]], [[SRC2]]
127; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG3]], [[SRC3]]
128; GCN-DAG: v_cmp_gt
129; GCN-DAG: v_cmp_gt
130; GCN-DAG: v_cmp_gt
131; GCN-DAG: v_cmp_gt
132; GCN-DAG: v_cndmask_b32
133; GCN-DAG: v_cndmask_b32
134; GCN-DAG: v_cndmask_b32
135; GCN-DAG: v_cndmask_b32
136; GCN: v_add_i32
137; GCN: v_add_i32
138; GCN: v_add_i32
139; GCN: v_add_i32
140define void @v_abs_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %src) nounwind {
141 %z0 = insertelement <4 x i32> undef, i32 0, i32 0
142 %z1 = insertelement <4 x i32> %z0, i32 0, i32 1
143 %z2 = insertelement <4 x i32> %z1, i32 0, i32 2
144 %z3 = insertelement <4 x i32> %z2, i32 0, i32 3
145 %t0 = insertelement <4 x i32> undef, i32 2, i32 0
146 %t1 = insertelement <4 x i32> %t0, i32 2, i32 1
147 %t2 = insertelement <4 x i32> %t1, i32 2, i32 2
148 %t3 = insertelement <4 x i32> %t2, i32 2, i32 3
149 %val = load <4 x i32>, <4 x i32> addrspace(1)* %src, align 4
150 %neg = sub <4 x i32> %z3, %val
151 %cond = icmp sgt <4 x i32> %val, %neg
152 %res = select <4 x i1> %cond, <4 x i32> %val, <4 x i32> %neg
153 %res2 = add <4 x i32> %res, %t3
154 store <4 x i32> %res2, <4 x i32> addrspace(1)* %out, align 4
155 ret void
156}