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Kevin Enderby0d928a12014-07-31 23:57:38 +00001//===-- X86InstrSGX.td - SGX Instruction Set Extension -----*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes the instructions that make up the Intel SGX instruction
11// set.
12//
13//===----------------------------------------------------------------------===//
14
15//===----------------------------------------------------------------------===//
16// SGX instructions
17
Gabor Buella4a02bf92018-05-08 07:11:05 +000018let SchedRW = [WriteSystem], Predicates = [HasSGX] in {
Kevin Enderby0d928a12014-07-31 23:57:38 +000019// ENCLS - Execute an Enclave System Function of Specified Leaf Number
20def ENCLS : I<0x01, MRM_CF, (outs), (ins),
Craig Toppera898c2d2015-02-05 08:51:02 +000021 "encls", []>, TB;
Kevin Enderby0d928a12014-07-31 23:57:38 +000022
23// ENCLU - Execute an Enclave User Function of Specified Leaf Number
24def ENCLU : I<0x01, MRM_D7, (outs), (ins),
Craig Toppera898c2d2015-02-05 08:51:02 +000025 "enclu", []>, TB;
Gabor Buella4a02bf92018-05-08 07:11:05 +000026
27// ENCLV - Execute an Enclave VMM Function of Specified Leaf Number
28def ENCLV : I<0x01, MRM_C0, (outs), (ins),
29 "enclv", []>, TB;
Simon Pilgrim2db28512017-12-08 19:26:22 +000030} // SchedRW