| Clement Courbet | b449379 | 2018-04-10 08:16:37 +0000 | [diff] [blame] | 1 | //===-- X86PfmCounters.td - X86 Hardware Counters ----------*- tablegen -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This describes the available hardware counters for various subtargets. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 14 | def UnhaltedCoreCyclesPfmCounter : PfmCounter<"unhalted_core_cycles">; |
| 15 | def UopsIssuedPfmCounter : PfmCounter<"uops_issued:any">; |
| Clement Courbet | b449379 | 2018-04-10 08:16:37 +0000 | [diff] [blame] | 16 | |
| Clement Courbet | eee2e06 | 2018-11-09 13:15:32 +0000 | [diff] [blame] | 17 | // No default counters on X86. |
| 18 | def DefaultPfmCounters : ProcPfmCounters {} |
| 19 | def : PfmCountersDefaultBinding<DefaultPfmCounters>; |
| 20 | |
| Simon Pilgrim | 6155b32 | 2018-12-07 17:48:40 +0000 | [diff] [blame] | 21 | // Intel X86 Counters. |
| 22 | def PentiumPfmCounters : ProcPfmCounters { |
| 23 | let CycleCounter = PfmCounter<"cpu_clk_unhalted">; |
| 24 | let UopsCounter = PfmCounter<"uops_retired">; |
| 25 | } |
| 26 | def : PfmCountersBinding<"pentiumpro", PentiumPfmCounters>; |
| 27 | def : PfmCountersBinding<"pentium2", PentiumPfmCounters>; |
| 28 | def : PfmCountersBinding<"pentium3", PentiumPfmCounters>; |
| 29 | def : PfmCountersBinding<"pentium3m", PentiumPfmCounters>; |
| 30 | def : PfmCountersBinding<"pentium-m", PentiumPfmCounters>; |
| 31 | |
| 32 | def CorePfmCounters : ProcPfmCounters { |
| 33 | let CycleCounter = UnhaltedCoreCyclesPfmCounter; |
| 34 | let UopsCounter = PfmCounter<"uops_retired:any">; |
| 35 | } |
| 36 | def : PfmCountersBinding<"yonah", CorePfmCounters>; |
| 37 | def : PfmCountersBinding<"prescott", CorePfmCounters>; |
| 38 | def : PfmCountersBinding<"core2", CorePfmCounters>; |
| 39 | def : PfmCountersBinding<"penryn", CorePfmCounters>; |
| 40 | def : PfmCountersBinding<"nehalem", CorePfmCounters>; |
| 41 | def : PfmCountersBinding<"corei7", CorePfmCounters>; |
| 42 | def : PfmCountersBinding<"westmere", CorePfmCounters>; |
| 43 | |
| 44 | def AtomPfmCounters : ProcPfmCounters { |
| 45 | let CycleCounter = UnhaltedCoreCyclesPfmCounter; |
| 46 | let UopsCounter = PfmCounter<"uops_retired:any">; |
| 47 | } |
| 48 | def : PfmCountersBinding<"bonnell", AtomPfmCounters>; |
| 49 | def : PfmCountersBinding<"atom", AtomPfmCounters>; |
| 50 | |
| 51 | def SLMPfmCounters : ProcPfmCounters { |
| 52 | let CycleCounter = UnhaltedCoreCyclesPfmCounter; |
| 53 | let UopsCounter = PfmCounter<"uops_retired:any">; |
| 54 | } |
| 55 | def : PfmCountersBinding<"silvermont", SLMPfmCounters>; |
| 56 | def : PfmCountersBinding<"goldmont", SLMPfmCounters>; |
| 57 | def : PfmCountersBinding<"goldmont-plus", SLMPfmCounters>; |
| 58 | def : PfmCountersBinding<"tremont", SLMPfmCounters>; |
| Simon Pilgrim | e9d8275 | 2018-12-09 13:45:15 +0000 | [diff] [blame] | 59 | |
| 60 | def KnightPfmCounters : ProcPfmCounters { |
| 61 | let CycleCounter = UnhaltedCoreCyclesPfmCounter; |
| 62 | let UopsCounter = PfmCounter<"uops_retired:all">; |
| 63 | } |
| 64 | def : PfmCountersBinding<"knl", KnightPfmCounters>; |
| 65 | def : PfmCountersBinding<"knm", KnightPfmCounters>; |
| Simon Pilgrim | 6155b32 | 2018-12-07 17:48:40 +0000 | [diff] [blame] | 66 | |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 67 | def SandyBridgePfmCounters : ProcPfmCounters { |
| 68 | let CycleCounter = UnhaltedCoreCyclesPfmCounter; |
| 69 | let UopsCounter = UopsIssuedPfmCounter; |
| 70 | let IssueCounters = [ |
| 71 | PfmIssueCounter<"SBPort0", "uops_dispatched_port:port_0">, |
| 72 | PfmIssueCounter<"SBPort1", "uops_dispatched_port:port_1">, |
| 73 | PfmIssueCounter<"SBPort23", "uops_dispatched_port:port_2 + uops_dispatched_port:port_3">, |
| 74 | PfmIssueCounter<"SBPort4", "uops_dispatched_port:port_4">, |
| 75 | PfmIssueCounter<"SBPort5", "uops_dispatched_port:port_5"> |
| 76 | ]; |
| Clement Courbet | b449379 | 2018-04-10 08:16:37 +0000 | [diff] [blame] | 77 | } |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 78 | def : PfmCountersBinding<"sandybridge", SandyBridgePfmCounters>; |
| Simon Pilgrim | 9c7d85b | 2018-12-07 09:27:35 +0000 | [diff] [blame] | 79 | def : PfmCountersBinding<"ivybridge", SandyBridgePfmCounters>; |
| Clement Courbet | b449379 | 2018-04-10 08:16:37 +0000 | [diff] [blame] | 80 | |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 81 | def HaswellPfmCounters : ProcPfmCounters { |
| 82 | let CycleCounter = UnhaltedCoreCyclesPfmCounter; |
| 83 | let UopsCounter = UopsIssuedPfmCounter; |
| 84 | let IssueCounters = [ |
| 85 | PfmIssueCounter<"HWPort0", "uops_dispatched_port:port_0">, |
| 86 | PfmIssueCounter<"HWPort1", "uops_dispatched_port:port_1">, |
| 87 | PfmIssueCounter<"HWPort2", "uops_dispatched_port:port_2">, |
| 88 | PfmIssueCounter<"HWPort3", "uops_dispatched_port:port_3">, |
| 89 | PfmIssueCounter<"HWPort4", "uops_dispatched_port:port_4">, |
| 90 | PfmIssueCounter<"HWPort5", "uops_dispatched_port:port_5">, |
| 91 | PfmIssueCounter<"HWPort6", "uops_dispatched_port:port_6">, |
| 92 | PfmIssueCounter<"HWPort7", "uops_dispatched_port:port_7"> |
| 93 | ]; |
| Clement Courbet | b449379 | 2018-04-10 08:16:37 +0000 | [diff] [blame] | 94 | } |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 95 | def : PfmCountersBinding<"haswell", HaswellPfmCounters>; |
| Clement Courbet | b449379 | 2018-04-10 08:16:37 +0000 | [diff] [blame] | 96 | |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 97 | def BroadwellPfmCounters : ProcPfmCounters { |
| 98 | let CycleCounter = UnhaltedCoreCyclesPfmCounter; |
| 99 | let UopsCounter = UopsIssuedPfmCounter; |
| 100 | let IssueCounters = [ |
| 101 | PfmIssueCounter<"BWPort0", "uops_executed_port:port_0">, |
| 102 | PfmIssueCounter<"BWPort1", "uops_executed_port:port_1">, |
| 103 | PfmIssueCounter<"BWPort2", "uops_executed_port:port_2">, |
| 104 | PfmIssueCounter<"BWPort3", "uops_executed_port:port_3">, |
| 105 | PfmIssueCounter<"BWPort4", "uops_executed_port:port_4">, |
| 106 | PfmIssueCounter<"BWPort5", "uops_executed_port:port_5">, |
| 107 | PfmIssueCounter<"BWPort6", "uops_executed_port:port_6">, |
| 108 | PfmIssueCounter<"BWPort7", "uops_executed_port:port_7"> |
| 109 | ]; |
| Clement Courbet | b449379 | 2018-04-10 08:16:37 +0000 | [diff] [blame] | 110 | } |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 111 | def : PfmCountersBinding<"broadwell", BroadwellPfmCounters>; |
| Clement Courbet | b449379 | 2018-04-10 08:16:37 +0000 | [diff] [blame] | 112 | |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 113 | def SkylakeClientPfmCounters : ProcPfmCounters { |
| 114 | let CycleCounter = UnhaltedCoreCyclesPfmCounter; |
| 115 | let UopsCounter = UopsIssuedPfmCounter; |
| 116 | let IssueCounters = [ |
| 117 | PfmIssueCounter<"SKLPort0", "uops_dispatched_port:port_0">, |
| 118 | PfmIssueCounter<"SKLPort1", "uops_dispatched_port:port_1">, |
| 119 | PfmIssueCounter<"SKLPort2", "uops_dispatched_port:port_2">, |
| 120 | PfmIssueCounter<"SKLPort3", "uops_dispatched_port:port_3">, |
| 121 | PfmIssueCounter<"SKLPort4", "uops_dispatched_port:port_4">, |
| 122 | PfmIssueCounter<"SKLPort5", "uops_dispatched_port:port_5">, |
| 123 | PfmIssueCounter<"SKLPort6", "uops_dispatched_port:port_6">, |
| 124 | PfmIssueCounter<"SKLPort7", "uops_dispatched_port:port_7"> |
| 125 | ]; |
| Clement Courbet | b449379 | 2018-04-10 08:16:37 +0000 | [diff] [blame] | 126 | } |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 127 | def : PfmCountersBinding<"skylake", SkylakeClientPfmCounters>; |
| Simon Pilgrim | a90c211 | 2018-05-24 14:54:32 +0000 | [diff] [blame] | 128 | |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 129 | def SkylakeServerPfmCounters : ProcPfmCounters { |
| 130 | let CycleCounter = UnhaltedCoreCyclesPfmCounter; |
| 131 | let UopsCounter = UopsIssuedPfmCounter; |
| 132 | let IssueCounters = [ |
| 133 | PfmIssueCounter<"SKXPort0", "uops_dispatched_port:port_0">, |
| 134 | PfmIssueCounter<"SKXPort1", "uops_dispatched_port:port_1">, |
| 135 | PfmIssueCounter<"SKXPort2", "uops_dispatched_port:port_2">, |
| 136 | PfmIssueCounter<"SKXPort3", "uops_dispatched_port:port_3">, |
| 137 | PfmIssueCounter<"SKXPort4", "uops_dispatched_port:port_4">, |
| 138 | PfmIssueCounter<"SKXPort5", "uops_dispatched_port:port_5">, |
| 139 | PfmIssueCounter<"SKXPort6", "uops_dispatched_port:port_6">, |
| 140 | PfmIssueCounter<"SKXPort7", "uops_dispatched_port:port_7"> |
| 141 | ]; |
| Simon Pilgrim | a90c211 | 2018-05-24 14:54:32 +0000 | [diff] [blame] | 142 | } |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 143 | def : PfmCountersBinding<"skylake-avx512", SkylakeServerPfmCounters>; |
| Simon Pilgrim | 6155b32 | 2018-12-07 17:48:40 +0000 | [diff] [blame] | 144 | def : PfmCountersBinding<"cascadelake", SkylakeServerPfmCounters>; |
| 145 | def : PfmCountersBinding<"cannonlake", SkylakeServerPfmCounters>; |
| 146 | def : PfmCountersBinding<"icelake-client", SkylakeServerPfmCounters>; |
| 147 | def : PfmCountersBinding<"icelake-server", SkylakeServerPfmCounters>; |
| 148 | |
| 149 | // AMD X86 Counters. |
| 150 | // Set basic counters for AMD cpus that we know libpfm4 supports. |
| 151 | def DefaultAMDPfmCounters : ProcPfmCounters { |
| 152 | let CycleCounter = PfmCounter<"cpu_clk_unhalted">; |
| 153 | let UopsCounter = PfmCounter<"retired_uops">; |
| 154 | } |
| 155 | def : PfmCountersBinding<"athlon", DefaultAMDPfmCounters>; |
| 156 | def : PfmCountersBinding<"athlon-tbird", DefaultAMDPfmCounters>; |
| 157 | def : PfmCountersBinding<"athlon-4", DefaultAMDPfmCounters>; |
| 158 | def : PfmCountersBinding<"athlon-xp", DefaultAMDPfmCounters>; |
| 159 | def : PfmCountersBinding<"athlon-mp", DefaultAMDPfmCounters>; |
| 160 | def : PfmCountersBinding<"k8", DefaultAMDPfmCounters>; |
| 161 | def : PfmCountersBinding<"opteron", DefaultAMDPfmCounters>; |
| 162 | def : PfmCountersBinding<"athlon64", DefaultAMDPfmCounters>; |
| 163 | def : PfmCountersBinding<"athlon-fx", DefaultAMDPfmCounters>; |
| 164 | def : PfmCountersBinding<"k8-sse3", DefaultAMDPfmCounters>; |
| 165 | def : PfmCountersBinding<"opteron-sse3", DefaultAMDPfmCounters>; |
| 166 | def : PfmCountersBinding<"athlon64-sse3", DefaultAMDPfmCounters>; |
| 167 | def : PfmCountersBinding<"amdfam10", DefaultAMDPfmCounters>; |
| 168 | def : PfmCountersBinding<"barcelona", DefaultAMDPfmCounters>; |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 169 | |
| Roman Lebedev | a5baf86 | 2018-10-27 20:46:30 +0000 | [diff] [blame] | 170 | def BdVer2PfmCounters : ProcPfmCounters { |
| 171 | let CycleCounter = PfmCounter<"cpu_clk_unhalted">; |
| 172 | let UopsCounter = PfmCounter<"retired_uops">; |
| 173 | let IssueCounters = [ |
| 174 | PfmIssueCounter<"PdFPU0", "dispatched_fpu_ops:ops_pipe0 + dispatched_fpu_ops:ops_dual_pipe0">, |
| 175 | PfmIssueCounter<"PdFPU1", "dispatched_fpu_ops:ops_pipe1 + dispatched_fpu_ops:ops_dual_pipe1">, |
| 176 | PfmIssueCounter<"PdFPU2", "dispatched_fpu_ops:ops_pipe2 + dispatched_fpu_ops:ops_dual_pipe2">, |
| 177 | PfmIssueCounter<"PdFPU3", "dispatched_fpu_ops:ops_pipe3 + dispatched_fpu_ops:ops_dual_pipe3"> |
| 178 | ]; |
| 179 | } |
| Simon Pilgrim | 6155b32 | 2018-12-07 17:48:40 +0000 | [diff] [blame] | 180 | def : PfmCountersBinding<"bdver1", BdVer2PfmCounters>; |
| Roman Lebedev | a5baf86 | 2018-10-27 20:46:30 +0000 | [diff] [blame] | 181 | def : PfmCountersBinding<"bdver2", BdVer2PfmCounters>; |
| 182 | |
| Simon Pilgrim | e9d8275 | 2018-12-09 13:45:15 +0000 | [diff] [blame] | 183 | def BdVer3PfmCounters : ProcPfmCounters { |
| 184 | let CycleCounter = PfmCounter<"cpu_clk_unhalted">; |
| 185 | let UopsCounter = PfmCounter<"retired_uops">; |
| 186 | let IssueCounters = [ |
| 187 | PfmIssueCounter<"SrFPU0", "dispatched_fpu_ops:ops_pipe0 + dispatched_fpu_ops:ops_dual_pipe0">, |
| 188 | PfmIssueCounter<"SrFPU1", "dispatched_fpu_ops:ops_pipe1 + dispatched_fpu_ops:ops_dual_pipe1">, |
| 189 | PfmIssueCounter<"SrFPU2", "dispatched_fpu_ops:ops_pipe2 + dispatched_fpu_ops:ops_dual_pipe2"> |
| 190 | ]; |
| 191 | } |
| 192 | def : PfmCountersBinding<"bdver3", BdVer3PfmCounters>; |
| 193 | def : PfmCountersBinding<"bdver4", BdVer3PfmCounters>; |
| 194 | |
| 195 | def BtVer1PfmCounters : ProcPfmCounters { |
| 196 | let CycleCounter = PfmCounter<"cpu_clk_unhalted">; |
| 197 | let UopsCounter = PfmCounter<"retired_uops">; |
| 198 | let IssueCounters = [ |
| 199 | PfmIssueCounter<"BtFPU0", "dispatched_fpu:pipe0">, |
| 200 | PfmIssueCounter<"BtFPU1", "dispatched_fpu:pipe1"> |
| 201 | ]; |
| 202 | } |
| 203 | def : PfmCountersBinding<"btver1", BtVer1PfmCounters>; |
| 204 | |
| Clement Courbet | 41c8af3 | 2018-10-25 07:44:01 +0000 | [diff] [blame] | 205 | def BtVer2PfmCounters : ProcPfmCounters { |
| 206 | let CycleCounter = PfmCounter<"cpu_clk_unhalted">; |
| 207 | let UopsCounter = PfmCounter<"retired_uops">; |
| 208 | let IssueCounters = [ |
| 209 | PfmIssueCounter<"JFPU0", "dispatched_fpu:pipe0">, |
| 210 | PfmIssueCounter<"JFPU1", "dispatched_fpu:pipe1"> |
| 211 | ]; |
| 212 | } |
| 213 | def : PfmCountersBinding<"btver2", BtVer2PfmCounters>; |
| Simon Pilgrim | 6155b32 | 2018-12-07 17:48:40 +0000 | [diff] [blame] | 214 | |
| 215 | def ZnVer1PfmCounters : ProcPfmCounters { |
| 216 | let CycleCounter = PfmCounter<"cycles_not_in_halt">; |
| 217 | let UopsCounter = PfmCounter<"retired_uops">; |
| 218 | let IssueCounters = [ |
| 219 | PfmIssueCounter<"ZnFPU0", "fpu_pipe_assignment:total0">, |
| 220 | PfmIssueCounter<"ZnFPU1", "fpu_pipe_assignment:total1">, |
| 221 | PfmIssueCounter<"ZnFPU2", "fpu_pipe_assignment:total2">, |
| 222 | PfmIssueCounter<"ZnFPU3", "fpu_pipe_assignment:total3">, |
| 223 | PfmIssueCounter<"ZnDivider", "div_op_count"> |
| 224 | ]; |
| 225 | } |
| 226 | def : PfmCountersBinding<"znver1", ZnVer1PfmCounters>; |