| Stanislav Mekhanoshin | 6071e1a | 2018-12-13 03:17:40 +0000 | [diff] [blame] | 1 | # RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=si-optimize-exec-masking-pre-ra -o - %s | FileCheck -check-prefix=GCN %s |
| 2 | |
| 3 | # GCN: name: negated_cond_vop2 |
| 4 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 5 | # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| 6 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 7 | --- |
| 8 | name: negated_cond_vop2 |
| 9 | body: | |
| 10 | bb.0: |
| 11 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 12 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 13 | V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 14 | $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| 15 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 16 | S_BRANCH %bb.1 |
| 17 | |
| 18 | bb.1: |
| 19 | S_BRANCH %bb.0 |
| 20 | |
| 21 | bb.2: |
| 22 | S_ENDPGM |
| 23 | ... |
| 24 | |
| 25 | # GCN: name: negated_cond_vop3 |
| 26 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 27 | # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| 28 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 29 | --- |
| 30 | name: negated_cond_vop3 |
| 31 | body: | |
| 32 | bb.0: |
| 33 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 34 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 35 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| 36 | $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| 37 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 38 | S_BRANCH %bb.1 |
| 39 | |
| 40 | bb.1: |
| 41 | S_BRANCH %bb.0 |
| 42 | |
| 43 | bb.2: |
| 44 | S_ENDPGM |
| 45 | ... |
| 46 | |
| 47 | # GCN: name: negated_cond_vop2_redef_vcc1 |
| 48 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 49 | # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 50 | # GCN-NEXT: V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 51 | # GCN-NEXT: $vcc_lo = COPY $sgpr0 |
| 52 | # GCN-NEXT: $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc |
| 53 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 54 | --- |
| 55 | name: negated_cond_vop2_redef_vcc1 |
| 56 | body: | |
| 57 | bb.0: |
| 58 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 59 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 60 | V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 61 | $vcc_lo = COPY $sgpr0 |
| 62 | $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| 63 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 64 | S_BRANCH %bb.1 |
| 65 | |
| 66 | bb.1: |
| 67 | S_BRANCH %bb.0 |
| 68 | |
| 69 | bb.2: |
| 70 | S_ENDPGM |
| 71 | ... |
| 72 | |
| 73 | # GCN: name: negated_cond_vop2_redef_vcc2 |
| 74 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 75 | # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 76 | # GCN-NEXT: V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 77 | # GCN-NEXT: $vcc_hi = COPY $sgpr0 |
| 78 | # GCN-NEXT: $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc |
| 79 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 80 | --- |
| 81 | name: negated_cond_vop2_redef_vcc2 |
| 82 | body: | |
| 83 | bb.0: |
| 84 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 85 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 86 | V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 87 | $vcc_hi = COPY $sgpr0 |
| 88 | $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| 89 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 90 | S_BRANCH %bb.1 |
| 91 | |
| 92 | bb.1: |
| 93 | S_BRANCH %bb.0 |
| 94 | |
| 95 | bb.2: |
| 96 | S_ENDPGM |
| 97 | ... |
| 98 | |
| 99 | # GCN: name: negated_cond_vop3_redef_cmp |
| 100 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 101 | # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 102 | # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| 103 | # GCN-NEXT: %2.sub1:sreg_64_xexec = COPY $sgpr0 |
| 104 | # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| 105 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 106 | --- |
| 107 | name: negated_cond_vop3_redef_cmp |
| 108 | body: | |
| 109 | bb.0: |
| 110 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 111 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 112 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| 113 | %2.sub1 = COPY $sgpr0 |
| 114 | $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| 115 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 116 | S_BRANCH %bb.1 |
| 117 | |
| 118 | bb.1: |
| 119 | S_BRANCH %bb.0 |
| 120 | |
| 121 | bb.2: |
| 122 | S_ENDPGM |
| 123 | ... |
| 124 | |
| 125 | # GCN: name: negated_cond_undef_vcc |
| 126 | # GCN: $vcc = S_AND_B64 $exec, undef $vcc, implicit-def dead $scc |
| 127 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 128 | --- |
| 129 | name: negated_cond_undef_vcc |
| 130 | body: | |
| 131 | bb.0: |
| 132 | $vcc = S_AND_B64 $exec, undef $vcc, implicit-def dead $scc |
| 133 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 134 | S_BRANCH %bb.1 |
| 135 | |
| 136 | bb.1: |
| 137 | S_BRANCH %bb.0 |
| 138 | |
| 139 | bb.2: |
| 140 | S_ENDPGM |
| 141 | ... |
| 142 | |
| 143 | # GCN: name: negated_cond_vop3_imp_vcc |
| 144 | # GCN: $vcc = IMPLICIT_DEF |
| 145 | # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, $vcc, implicit-def $scc |
| 146 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 147 | --- |
| 148 | name: negated_cond_vop3_imp_vcc |
| 149 | body: | |
| 150 | bb.0: |
| 151 | $vcc = IMPLICIT_DEF |
| 152 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, $vcc, implicit $exec |
| 153 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| 154 | $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| 155 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 156 | S_BRANCH %bb.1 |
| 157 | |
| 158 | bb.1: |
| 159 | S_BRANCH %bb.0 |
| 160 | |
| 161 | bb.2: |
| 162 | S_ENDPGM |
| 163 | ... |
| 164 | |
| 165 | # GCN: name: negated_cond_vop2_imp_vcc |
| 166 | # GCN: $vcc = IMPLICIT_DEF |
| 167 | # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, $vcc, implicit-def $scc |
| 168 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 169 | --- |
| 170 | name: negated_cond_vop2_imp_vcc |
| 171 | body: | |
| 172 | bb.0: |
| 173 | $vcc = IMPLICIT_DEF |
| 174 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, $vcc, implicit $exec |
| 175 | V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 176 | $vcc = S_AND_B64 killed $vcc, $exec, implicit-def dead $scc |
| 177 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 178 | S_BRANCH %bb.1 |
| 179 | |
| 180 | bb.1: |
| 181 | S_BRANCH %bb.0 |
| 182 | |
| 183 | bb.2: |
| 184 | S_ENDPGM |
| 185 | ... |
| 186 | |
| 187 | # GCN: name: negated_cond_vop3_redef_sel |
| 188 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 189 | # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 190 | # GCN-NEXT: %1:vgpr_32 = COPY $vgpr0 |
| 191 | # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| 192 | # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| 193 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 194 | --- |
| 195 | name: negated_cond_vop3_redef_sel |
| 196 | body: | |
| 197 | bb.0: |
| 198 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 199 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 200 | %1:vgpr_32 = COPY $vgpr0 |
| 201 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| 202 | $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| 203 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 204 | S_BRANCH %bb.1 |
| 205 | |
| 206 | bb.1: |
| 207 | S_BRANCH %bb.0 |
| 208 | |
| 209 | bb.2: |
| 210 | S_ENDPGM |
| 211 | ... |
| 212 | |
| 213 | # GCN: name: negated_cond_vop2_used_sel |
| 214 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 215 | # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 216 | # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| 217 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 218 | --- |
| 219 | name: negated_cond_vop2_used_sel |
| 220 | body: | |
| 221 | bb.0: |
| 222 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 223 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 224 | V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 225 | $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| 226 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 227 | S_BRANCH %bb.1 |
| 228 | |
| 229 | bb.1: |
| 230 | S_BRANCH %bb.0 |
| 231 | |
| 232 | bb.2: |
| 233 | $vgpr0 = COPY %1 |
| 234 | S_ENDPGM |
| 235 | ... |
| 236 | |
| 237 | # GCN: name: negated_cond_vop2_used_vcc |
| 238 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 239 | # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 240 | # GCN-NEXT: V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 241 | # GCN-NEXT: $sgpr0_sgpr1 = COPY $vcc |
| 242 | # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| 243 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 244 | --- |
| 245 | name: negated_cond_vop2_used_vcc |
| 246 | body: | |
| 247 | bb.0: |
| 248 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 249 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 250 | V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 251 | $sgpr0_sgpr1 = COPY $vcc |
| 252 | $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| 253 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 254 | S_BRANCH %bb.1 |
| 255 | |
| 256 | bb.1: |
| 257 | S_BRANCH %bb.0 |
| 258 | |
| 259 | bb.2: |
| 260 | S_ENDPGM |
| 261 | ... |
| 262 | |
| 263 | # GCN: name: negated_cond_vop3_sel_wrong_subreg1 |
| 264 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 265 | # GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF |
| 266 | # GCN-NEXT: %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 267 | # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec |
| 268 | # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| 269 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 270 | --- |
| 271 | name: negated_cond_vop3_sel_wrong_subreg1 |
| 272 | body: | |
| 273 | bb.0: |
| 274 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 275 | %1.sub1 = IMPLICIT_DEF |
| 276 | %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 277 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec |
| 278 | $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| 279 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 280 | S_BRANCH %bb.1 |
| 281 | |
| 282 | bb.1: |
| 283 | S_BRANCH %bb.0 |
| 284 | |
| 285 | bb.2: |
| 286 | S_ENDPGM |
| 287 | ... |
| 288 | |
| 289 | # GCN: name: negated_cond_vop3_sel_wrong_subreg2 |
| 290 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 291 | # GCN-NEXT: %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 292 | # GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF |
| 293 | # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec |
| 294 | # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| 295 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 296 | --- |
| 297 | name: negated_cond_vop3_sel_wrong_subreg2 |
| 298 | body: | |
| 299 | bb.0: |
| 300 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 301 | %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 302 | %1.sub1 = IMPLICIT_DEF |
| 303 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec |
| 304 | $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| 305 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 306 | S_BRANCH %bb.1 |
| 307 | |
| 308 | bb.1: |
| 309 | S_BRANCH %bb.0 |
| 310 | |
| 311 | bb.2: |
| 312 | S_ENDPGM |
| 313 | ... |
| 314 | |
| 315 | # GCN: name: negated_cond_vop3_sel_right_subreg1 |
| 316 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 317 | # GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF |
| 318 | # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| 319 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 320 | --- |
| 321 | name: negated_cond_vop3_sel_right_subreg1 |
| 322 | body: | |
| 323 | bb.0: |
| 324 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 325 | %1.sub1 = IMPLICIT_DEF |
| 326 | %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 327 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub0, 1, implicit $exec |
| 328 | $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| 329 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 330 | S_BRANCH %bb.1 |
| 331 | |
| 332 | bb.1: |
| 333 | S_BRANCH %bb.0 |
| 334 | |
| 335 | bb.2: |
| 336 | S_ENDPGM |
| 337 | ... |
| 338 | |
| 339 | # GCN: name: negated_cond_vop3_sel_right_subreg2 |
| 340 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 341 | # GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF |
| 342 | # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| 343 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 344 | --- |
| 345 | name: negated_cond_vop3_sel_right_subreg2 |
| 346 | body: | |
| 347 | bb.0: |
| 348 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 349 | %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 350 | %1.sub1 = IMPLICIT_DEF |
| 351 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub0, 1, implicit $exec |
| 352 | $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| 353 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 354 | S_BRANCH %bb.1 |
| 355 | |
| 356 | bb.1: |
| 357 | S_BRANCH %bb.0 |
| 358 | |
| 359 | bb.2: |
| 360 | S_ENDPGM |
| 361 | ... |
| 362 | |
| 363 | # GCN: name: negated_cond_vop3_sel_subreg_overlap |
| 364 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 365 | # GCN-NEXT: %1.sub2:vreg_128 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 366 | # GCN-NEXT: %1.sub2_sub3:vreg_128 = IMPLICIT_DEF |
| 367 | # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub2, 1, implicit $exec |
| 368 | # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| 369 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| 370 | --- |
| 371 | name: negated_cond_vop3_sel_subreg_overlap |
| 372 | body: | |
| 373 | bb.0: |
| 374 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 375 | %1.sub2:vreg_128 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 376 | %1.sub2_sub3 = IMPLICIT_DEF |
| 377 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub2, 1, implicit $exec |
| 378 | $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| 379 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 380 | S_BRANCH %bb.1 |
| 381 | |
| 382 | bb.1: |
| 383 | S_BRANCH %bb.0 |
| 384 | |
| 385 | bb.2: |
| 386 | S_ENDPGM |
| 387 | ... |
| 388 | |
| 389 | # GCN: name: negated_cond_vop2_dominated_blocks |
| 390 | # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| 391 | # GCN: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| 392 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.3, implicit $vcc |
| 393 | --- |
| 394 | name: negated_cond_vop2_dominated_blocks |
| 395 | body: | |
| 396 | bb.0: |
| 397 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 398 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 399 | |
| 400 | bb.1: |
| 401 | V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 402 | $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| 403 | S_CBRANCH_VCCNZ %bb.3, implicit killed $vcc |
| 404 | S_BRANCH %bb.2 |
| 405 | |
| 406 | bb.2: |
| 407 | S_BRANCH %bb.1 |
| 408 | |
| 409 | bb.3: |
| 410 | S_ENDPGM |
| 411 | ... |
| 412 | |
| 413 | # GCN: name: negated_cond_vop2_different_blocks_cmp_and |
| 414 | # GCN: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 415 | # GCN: $vcc = S_AND_B64 $exec, %2, implicit-def dead $scc |
| 416 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.3, implicit $vcc |
| 417 | --- |
| 418 | name: negated_cond_vop2_different_blocks_cmp_and |
| 419 | body: | |
| 420 | bb.0: |
| 421 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 422 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 423 | %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| 424 | |
| 425 | bb.1: |
| 426 | $vcc = S_AND_B64 $exec, killed %2, implicit-def dead $scc |
| 427 | S_CBRANCH_VCCNZ %bb.3, implicit killed $vcc |
| 428 | S_BRANCH %bb.2 |
| 429 | |
| 430 | bb.2: |
| 431 | S_BRANCH %bb.1 |
| 432 | |
| 433 | bb.3: |
| 434 | S_ENDPGM |
| 435 | ... |
| 436 | |
| 437 | # GCN: name: negated_cond_vop2_not_dominated_blocks |
| 438 | # GCN: V_CNDMASK_B32_e64 0, 1, |
| 439 | # GCN: $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc |
| 440 | # GCN-NEXT: S_CBRANCH_VCCNZ %bb.4, implicit $vcc |
| 441 | --- |
| 442 | name: negated_cond_vop2_not_dominated_blocks |
| 443 | body: | |
| 444 | bb.0: |
| 445 | $vcc = IMPLICIT_DEF |
| 446 | %1 = IMPLICIT_DEF |
| 447 | S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| 448 | S_BRANCH %bb.1 |
| 449 | |
| 450 | bb.1: |
| 451 | %0:sreg_64_xexec = IMPLICIT_DEF |
| 452 | %1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, %0, implicit $exec |
| 453 | |
| 454 | bb.2: |
| 455 | V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| 456 | $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| 457 | S_CBRANCH_VCCNZ %bb.4, implicit killed $vcc |
| 458 | S_BRANCH %bb.3 |
| 459 | |
| 460 | bb.3: |
| 461 | S_BRANCH %bb.2 |
| 462 | |
| 463 | bb.4: |
| 464 | S_ENDPGM |
| 465 | ... |